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AgeCommit message (Expand)Author
2016-09-15cpu: Add frequency scaling to the Trace CPURadhika Jagtap
2016-09-13kvm: Support timing accesses for KVM cpuMichael LeBeane
2016-09-13x86: Force strict ordering for memory mapped m5opsMichael LeBeane
2016-09-13sim: Refactor quiesce and remove FS assertsMichael LeBeane
2016-09-13dev: Add a DmaCallback class to DmaDeviceMichael LeBeane
2016-09-13sim, syscall_emul: Add mmap to EmulatedDriverMichael LeBeane
2016-09-13gpu-compute: Fix bug with return in cfgMichael LeBeane
2016-09-13dev: Exit correctly in dist-gem5Michael LeBeane
2016-09-13misc: Remove FullSystem check for networking componentsMichael LeBeane
2016-09-13base: Output all AddrRange parameters to config.iniMatt Poremba
2016-09-06dev, arm: Add a customizable NoMali GPU modelAndreas Sandberg
2016-08-22cpu, mem, sim: Change how KVM maps memoryDavid Hashe
2016-08-16dev: Revert 0a316996de76 [dev, sim: Added missing override...]Andreas Sandberg
2016-08-15cpu: Add missing override in Minor's exec contextAndreas Sandberg
2016-08-15cpu: Fixed clang errors. Added 'override' keyword for virtual functions.Reiley Jeapaul
2016-08-15mem: Print an MSHR without triggering any assertionsNikos Nikoleris
2016-08-15dev, sim: Added missing override keywords to fix CLANG compilation (OSX)Matteo Andreozzi
2016-08-15cpu, arch: fix the type used for the request flagsNikos Nikoleris
2016-08-12mem: Add support for secure packets in the snoop filterNikos Nikoleris
2016-08-12mem: Add snoop filter to SystemXBar by defaultAndreas Hansson
2016-08-12mem: Use FromCache attribute in snoop filter allocationAndreas Hansson
2016-08-12mem: Update mostly exclusive policy even furtherAndreas Hansson
2016-08-12mem: Update mostly exclusive cache policy to cover more casesAndreas Hansson
2016-08-12mem: Add a FromCache packet attributeAndreas Hansson
2016-08-10arm, dev: Add support for listing DMA ports in new platformsAndreas Sandberg
2016-08-10ruby: Implement support for functional accesses to PIO rangesAndreas Sandberg
2016-08-10arm: Don't report the boot ROM as a memory in config tablesAndreas Sandberg
2016-08-05sim: fix issues with pwrite(); don't enable fstatfsTony Gutierrez
2016-08-04x86, sim: add some syscalls to X86Tony Gutierrez
2016-08-02arm: s/ctx_id/ctx/ the GICCurtis Dunham
2016-08-02arm: bank GIC registers per CPUCurtis Dunham
2016-08-02arm: refactor page table walkingCurtis Dunham
2016-08-02arm: warn not fail on use of missing miscreg CNTHCTL_EL2Dylan Johnson
2016-08-02arm: Check TLB stage 2 permissions in AArch64Dylan Johnson
2016-08-02arm: correctly assign faulting IPA's to HPFAR_EL2Dylan Johnson
2016-08-02arm: Add TLBI instruction for stage 2 IPA'sDylan Johnson
2016-08-02arm: Fix stage 2 memory attribute checking in AArch64Dylan Johnson
2016-08-02arm: Fix trapping to Hypervisor during MSR/MRS read/writeDylan Johnson
2016-08-02arm: Fix secure state checking in various placesDylan Johnson
2016-08-02arm: Fix stage 2 determination in table walkerDylan Johnson
2016-08-02arm: Refactor aarch64 table walk logic to remove redundancyDylan Johnson
2016-08-02arm: Add check to fault routing for hypervisor/virtualizationDylan Johnson
2016-08-02arm: Fix EL perceived at TLB for address translation instructionsDylan Johnson
2016-08-02arm: Add AArch64 hypervisor call instruction 'hvc'Dylan Johnson
2016-08-02arm: add stage2 translation supportDylan Johnson
2016-08-02arm: enable EL2 supportCurtis Dunham
2016-08-02arm: invalidate TLB miscreg cache on modification of HSCTLRDylan Johnson
2016-08-02arm: change instruction classes to catch hyp trapsDylan Johnson
2016-07-21cpu: Fix Minor SMT WFI/drain interaction issuesMitch Hayenga
2016-07-21cpu: Add SMT support to MinorCPUMitch Hayenga
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