index
:
gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
Age
Commit message (
Expand
)
Author
2015-08-14
ruby: replace Address by Addr
Nilay Vaish
2015-08-14
ruby: rename variables Addr to addr
Nilay Vaish
2015-08-14
ruby: Protocol changes for SimObject MessageBuffers
Joel Hestness
2015-08-14
ruby: Expose MessageBuffers as SimObjects
Joel Hestness
2015-08-14
ruby: Change PerfectCacheMemory::lookup to return pointer
Joel Hestness
2015-08-14
ruby: Remove the RubyCache/CacheMemory latency
Joel Hestness
2015-08-11
sim: clocked object: function for converting cycles to ticks.
Nilay Vaish
2015-08-11
ruby: drop some redundant includes
Nilay Vaish
2015-08-11
ruby: slicc: allow mathematical operations on Ticks
Nilay Vaish
2015-08-07
sim: Flag EventQueue::getCurTick() as const
Andreas Sandberg
2015-08-07
mem: Cleanup packet accessor methods
Andreas Sandberg
2015-08-07
dev: Implement a simple display timing generator
Andreas Sandberg
2015-08-07
arm: Add support for programmable oscillators
Andreas Sandberg
2015-08-07
dev: Add a simple DMA engine that can be used by devices
Andreas Sandberg
2015-08-07
sim: Split ClockedObject to make it usable to non-SimObjects
Andreas Sandberg
2015-08-07
base: Rewrite the CircleBuf to fix bugs and add serialization
Andreas Sandberg
2015-08-07
dev, x86: Fix serialization bug in the i8042 device
Andreas Sandberg
2015-08-07
dev: Make serialization in Sinic constant
Andreas Sandberg
2015-08-07
base: Declare a type for context IDs
Andreas Sandberg
2015-08-07
base: Use constexpr in Cycles
Andreas Sandberg
2015-08-07
mem: Remove extraneous acquire/release flags and attributes
Andreas Hansson
2015-08-05
sim: Fixup comments and constness in draining infrastructure
Andreas Sandberg
2015-08-05
mem: Fixup incorrect include guards
Andreas Sandberg
2015-08-04
sim: Initialize Drainable::_drainState to the system's state
Andreas Sandberg
2015-08-04
mem: Move trace functionality from the CommMonitor to a probe
Andreas Sandberg
2015-08-04
mem: Redesign the stack distance calculator as a probe
Andreas Sandberg
2015-08-04
mem: Add probe support to the CommMonitor
Andreas Sandberg
2015-08-03
sim: function for testing for auto deletion
Timothy Jones
2015-08-03
uby: Fix checkpointing and restore
Timothy Jones
2015-08-03
ruby: mesi three level: multiple corrections to the protocol
Nilay Vaish
2015-08-03
ruby: mesi two,three level: copy data only when dirty
Nilay Vaish
2015-08-01
ruby: removed invalid assert in message comparitor
Brad Beckmann
2015-07-20
ruby: improved stall and wait debugging
Brad Beckmann
2015-07-20
slicc: fix error in conflicing symbol declaration
Brad Beckmann
2015-07-20
slicc: enable overloading in functions not in classes
Brad Beckmann
2015-07-20
ruby: change router pipeline stages to 2
David Hashe
2015-07-20
ruby: change advance_stage for flit_d
David Hashe
2015-07-20
slicc: improved stalling support in protocols
Brad Beckmann
2015-07-20
ruby: expose access permission to replacement policies
David Hashe
2015-07-20
ruby: adds size and empty apis to the msg buffer stallmap
David Hashe
2015-07-20
ruby: fix deadlock bug in banked array resource checks
David Hashe
2015-07-20
ruby: Fix for stallAndWait bug
David Hashe
2015-07-20
mem: add request types for acquire and release
David Hashe
2015-07-20
ruby: allocate a block in CacheMemory without updating LRU state
David Hashe
2015-07-20
ruby: speed up function used for cache walks
David Hashe
2015-07-20
slicc: support for arbitrary DPRINTF flags (not just RubySlicc)
David Hashe
2015-07-20
slicc: support for local variable declarations in action blocks
David Hashe
2015-07-20
ruby: initialize replacement policies with their own simobjs
David Hashe
2015-07-20
ruby: give access to cache tag/data latencies from SLICC
David Hashe
2015-07-20
slicc: support for multiple cache entry types in the same state machine
David Hashe
[next]