Age | Commit message (Collapse) | Author |
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It should be cleared prior to the call to recvRetry.
Add extra DPRINTF statement for clearer debugging output.
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parameters.
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import sys since sys may not be defined in whatever context the DictImporter
is used. Also reset self.installed after an unload since the same DictImporter
could be used again
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extra : convert_revision : 988ed7ad8cd41b69e8fc583e618b1b4a146216da
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extra : convert_revision : 31aad7170b35556a4c984f4ebc013137d55d85eb
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Lets CPU accesses to physical memory bypass Bus.
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extra : convert_revision : e56e3879de47ee10951a19bfcd8b62b6acdfb30c
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simple-timing test for ALPHA_FS breaks.
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extra : convert_revision : 5a1b05cddd480849913da81a3b3931fec16485a8
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way so a cache can handle partial block requests for i/o devices.
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extra : convert_revision : e6ef262bbbc5ad53498e55caac1897e6cc2a61e6
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Improve MRU checking for StaticInst, Bus, TLB
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extra : convert_revision : 9116b5655cd2986aeb4205438aad4a0f5a440006
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extra : convert_revision : 663021070a4bcc795bb44e1839b8bcec686a42f0
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Fixed the asz assembler symbol.
Adjusted the condion checks to have appropriate options.
Implemented the SCAS microcode.
Attached SCAS into the decoder.
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extra : convert_revision : 17bf9ddae6bc2069e43b076f8f83c4e54fb7966c
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repne prefixes.
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Also some touch up for ruflag.
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There is a fundemental flaw in how unaligned accesses are supported, but this
is still an improvement.
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extra : convert_revision : 1c20b524ac24cd4a812c876b067495ee6a7ae29f
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extra : convert_revision : 2dc81345176d1de247a567d1f748e2b2bd05f829
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REX prefix.
The only cases where this was the correct behavior are now handled with the
"B" operand type, and doing things this way was breaking some instructions,
notably a shift.
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extra : convert_revision : 072346d4f541edaceba7aecc26ba8d2cd756e481
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extra : convert_revision : b9e172bcb9551edf65c63f26dfa07d771edf3e1e
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Make instructions observe segment prefixes, default segment rules, segment
base addresses.
Also fix some microcode and add sib and riprel "keywords" to the x86
specialization of the microassembler.
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extra : convert_revision : be5a3b33d33f243ed6e1ad63faea8495e46d0ac9
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This lets you index into a group of registers without having to know
explicitly which one is the lowest in that group.
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extra : convert_revision : e3cad25a1c5910955204c37177b049ca9834cfd9
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The arch_prctl system call is used to set and get the FS and GS segment
bases. The FS segment is use for TLS, so glibc needs to be able to set it
up.
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This allows us to change memory modes as well.
Clean up the code while we're at it.
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extra : convert_revision : 2e399b2b407922ad076f93d33af73e3ba4c05218
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(instead of %import)
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This requires us to not use PyRun_SimpleString, but PyRun_String since the
latter actually returns a result
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Add support for declaring SimObjects to swig so their members can be wrapped.
Make sim_object.i only contain declarations for SimObject.
Create system.i to contain declarations for System.
Update python code to properly call the C++ given the new changes.
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away it seems.
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extra : convert_revision : f8d4d9f3d395d2d3db020cd016c7840876097791
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Get rid of some warnings that were accidentally committed.
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After very carefully reading through the Linux source, I'm pretty confident I now know -exactly- how the initial stack frame is constructed, filled, and aligned.
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As it is now, some objects will get the incorrect value depending where they
were defined.
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extra : convert_revision : a11a14842f9524739cbf54a48be6ec051f371200
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