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2008-06-12Dev: Seperate the 8254 timer from tsunami and use it in that and the PC.Gabe Black
2008-06-12BitUnion: Take out namespace declaration so bitunions can be declared inside ↵Gabe Black
classes.
2008-06-12X86: Add an event for the apic timer timeout. It doesn't get used yet.Gabe Black
2008-06-12X86: Rename the divide count register to divide configuration.Gabe Black
2008-06-12X86: Make the apic isr and irr work.Gabe Black
2008-06-12X86: Make the apic task priority register work.Gabe Black
2008-06-12X86: Make the logical destination and destination format work.Gabe Black
2008-06-12X86: Make the apic ID register work.Gabe Black
2008-06-12X86: Make the apic version register work.Gabe Black
2008-06-12X86: Implement a partial, sort of correct version of the protected mode ↵Gabe Black
variant of iret.
2008-06-12X86: Change how segment loading is performed.Gabe Black
2008-06-12X86: Make pushes and pops use the stack size instead of the data size.Gabe Black
2008-06-12X86: In non 64bit mode, throw a fault when a NULL segment is accessed.Gabe Black
2008-06-12X86: Take advantage of the new meta register.Gabe Black
2008-06-12X86: Keep handy values like the operating mode in one register.Gabe Black
2008-06-12X86: Change what the microop chks does.Gabe Black
Instead of computing the segment descriptor address, this now checks if a selector value/descriptor are legal for a particular purpose.
2008-06-12X86: Add a microop to read a segments attribute register.Gabe Black
2008-06-12X86: Add microops and supporting code to manipulate the whole rflags register.Gabe Black
2008-06-12X86: Add microops which panic, fatal, warn, and warn_once.Gabe Black
2008-06-12X86: Truncate descriptors to 16 bits.Gabe Black
2008-06-12X86: Redo BSF.Gabe Black
2008-06-12X86: Flesh out 3dnow instruction decoding a bit and grab the byte immediate.Gabe Black
2008-06-12X86: Make string instructions work when rcx=0.Gabe Black
2008-06-12X86: Have all 8 machine check registers since the kernel assumes they're there.Gabe Black
2008-06-12X86: Bypass unaligned access support for register addressed MSRs.Gabe Black
2008-06-12X86: Remove enforcement of APIC register access alignment. Panic if more ↵Gabe Black
than one register is accessed at a time.
2008-06-12X86: Fix the implementation of BSF.Gabe Black
2008-06-12X86: Bit scan forward/reverse were accidentally transposed.Gabe Black
2008-06-12X86: Fix a byte register indexing issue in the sign extending move from ↵Gabe Black
memory microcode.
2008-06-12X86: Add in some support for the tsc register.Gabe Black
2008-06-12CPU: Make the simple cpu trace data for loads/stores.Gabe Black
2008-06-11X86: Fix building on *BSD hostsAli Saidi
2008-06-11SCons: Fix more SCons version issuesAli Saidi
2008-05-20IGbE: Implement sending packet that is contained in more than 2 descriptors.Ali Saidi
--HG-- extra : convert_revision : 8fb7d5fad5cb840f69c31aa8b331dbe09e46ee9d
2008-05-20SCons: Fixing SCons bug 2006 issues for non-alpha ISAsStephen Hines
--HG-- extra : convert_revision : 26e3edef06d6f82aaf162825c151d18faadd6e72
2008-05-15Make sure that output files are always checked success before they're used.Ali Saidi
Make OutputDirectory::resolve() private and change the functions using resolve() to instead use create(). --HG-- extra : convert_revision : 36d4be629764d0c4c708cec8aa712cd15f966453
2008-05-06SCons: More scons fixing for SCons bug 2006Ali Saidi
--HG-- extra : convert_revision : d3656ab1e3c18251d4bcf6f5a31103d4b2dfdc43
2008-04-10SCons: add comments to SConscript documenting bug workaroundAli Saidi
--HG-- extra : convert_revision : e6cdffe953d56b96c76c7ff14d2dcc3de3ccfcc3
2008-04-10PhysicalMemory: Add parameter for variance in memory delay.Ali Saidi
--HG-- extra : convert_revision : b931472e81dedb650b7accb9061cb426f1c32e66
2008-04-08SCons: Manually specifying header only directories with Dir() works around ↵Ali Saidi
the problem --HG-- extra : convert_revision : d9713228d934cf4a45114a972603b8bca2bd27d3
2008-03-25IGbE: Fix bug that limits wire performance a bitAli Saidi
--HG-- extra : convert_revision : 3f93c17f647a6955dab861da211174de856ee02c
2008-03-25Automated merge with ssh://daystrom.m5sim.org//repo/m5Steve Reinhardt
--HG-- extra : convert_revision : 7922848bb1145bcb2ee07d672d21cfe2dd98fc03
2008-03-25Fix handling of writeback-induced writebacks in atomic mode.Steve Reinhardt
--HG-- extra : convert_revision : 4fa64f8a929f1aa36a9d5a71b8d1816b497aca4c
2008-03-25X86: Put an RTC into the CMOS part of the southbridge.Gabe Black
--HG-- extra : convert_revision : a614373236fe75db6e6181fc152a02b541a131f3
2008-03-25Devices: Separate out the MC146818 RTC so both Alpha and X86 can use it.Gabe Black
--HG-- extra : convert_revision : 1e7f5185654ed0845678c2169c702d3b977159ed
2008-03-25X86: Turn #defines into consts.Gabe Black
--HG-- extra : convert_revision : c0416de5d88ca39f54494418768e68a93aa4f2aa
2008-03-25X86: Start implementing the south bridge stuff.Gabe Black
--HG-- extra : convert_revision : 92918c05eb3363155d78889bdab17baa8eae9dca
2008-03-25X86: Change the Opteron platform to be the PC platform.Gabe Black
--HG-- extra : convert_revision : 2c6ffebbad04a21cef6ba3fbc1803218908a6c37
2008-03-24Delete the Request for a no-response PacketSteve Reinhardt
when the Packet is deleted, since the requester can't possibly do it. --HG-- extra : convert_revision : 8571b144ecb3c70efc06d09faa8b3161fb58352d
2008-03-24Don't FastAlloc MSHRs since we don't allocate them on the fly.Steve Reinhardt
--HG-- extra : convert_revision : 02775cfb460afe6df0df0938c62cccd93a71e775
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