Age | Commit message (Expand) | Author |
2017-05-08 | scons: Get rid of the PHONY_BASE construction variable. | Gabe Black |
2017-05-08 | scons: Replace str(foo.get_contents()) with foo.get_text_contents(). | Gabe Black |
2017-05-08 | scons: Make env['USE_PYTHON'] a source for createEnumStrings. | Gabe Black |
2017-05-05 | syscall_emul: Argument retrieval bug fix | Alexandru Dutu |
2017-05-03 | scons: Merge reading test SConscripts into makeEnv. | Gabe Black |
2017-05-02 | python: Remove SWIG | Andreas Sandberg |
2017-05-02 | base, sim, dev: Remove SWIG | Andreas Sandberg |
2017-05-02 | python: Use PyBind11 instead of SWIG for Python wrappers | Andreas Sandberg |
2017-05-01 | scons: Remove the SPAWN hack added earlier. | Gabe Black |
2017-05-01 | scons: Group Source-s based on what SConscript included them. | Gabe Black |
2017-05-01 | scons: Put Source objects in groups and partially link them. | Gabe Black |
2017-05-01 | arch-sparc: Fix wrong indentation causing warnings for gcc 6 | Nikos Nikoleris |
2017-05-01 | dev: Add ATA command used in recent Linux kernels | Jason Lowe-Power |
2017-04-18 | x86: fixed branching() computation for branch uops | Santi Galan |
2017-04-14 | scons: When spawning the linker process, don't involve the shell. | Gabe Black |
2017-04-11 | power: Allow global stats in power equations | Stephan Diestelhorst |
2017-04-11 | riscv: Fix crashes with large or frequent mmaps | Alec Roelke |
2017-04-08 | power: Clarify the unit used for the power equations (W) | Stephan Diestelhorst |
2017-04-06 | power: Add a voltage variable to power expressions | Andreas Sandberg |
2017-04-06 | power: Add error checking to MathExprPowerModel | Andreas Sandberg |
2017-04-05 | ruby: Fix MOESI_CMP_directory for new DMA status changes. | Javier Cano-Cano |
2017-04-05 | riscv: fix Linux problems with LR and SC ops | Alec Roelke |
2017-04-05 | riscv: fix compatibility with Linux toolchain | Alec Roelke |
2017-04-05 | riscv: add remote gdb support | Alec Roelke |
2017-04-05 | riscv: fix error on memory op address overflow | Alec Roelke |
2017-04-05 | riscv: enable unaligned memory accesses | Alec Roelke |
2017-04-03 | arm, kvm: implement GIC state transfer | Curtis Dunham |
2017-04-03 | arm, dev: add basic support for GICC_BPR register | Curtis Dunham |
2017-04-03 | arm, dev: refactor GIC Pl390 GICD_ITARGETSRn handling | Curtis Dunham |
2017-04-03 | arm: refactor packet processing in Pl390 GIC | Curtis Dunham |
2017-04-03 | arm: Don't panic when checking coprocessor read/write permissions | Nikos Nikoleris |
2017-04-03 | arm: Treat Write-Through Normal memory as Non-Cacheable | Nikos Nikoleris |
2017-04-03 | sim: Handle cases where Drainable::resume() creates objects | Andreas Sandberg |
2017-04-03 | arm, kvm: Override the kernel's default MPIDR value | Andreas Sandberg |
2017-04-03 | dev, arm: Fix multi-core KVM race in the generic timer | Andreas Sandberg |
2017-04-03 | dev: Align BAR0 size to power of 2 for VirtIO devices | Sascha Bischoff |
2017-04-03 | dev: Add a dummy VirtIO device | Andreas Sandberg |
2017-04-03 | dev: Rename VirtIO PCI debug flag | Andreas Sandberg |
2017-04-03 | arm: fix template instantiation warning in clang | Matteo Andreozzi |
2017-03-21 | arm: correct register read bug in Pl390 GIC | Curtis Dunham |
2017-03-21 | python: Automatically disable listeners in batch setups | Andreas Sandberg |
2017-03-17 | syscall-emul: Hotfix for FreeBSD/Mac builds | Brandon Potter |
2017-03-17 | syscall-emul: change NULL to nullptr in Process files | Brandon Potter |
2017-03-16 | cpu: Print progress messages in Trace CPU | Radhika Jagtap |
2017-03-15 | arm, dev: Add missing override in the Pl390 GIC model | Andreas Sandberg |
2017-03-13 | dev, arm: Add draining to the GIC model | Andreas Sandberg |
2017-03-13 | arm: Clean up the GIC implementation | Andreas Sandberg |
2017-03-09 | style: change NULL to nullptr in syscall files | Brandon Potter |
2017-03-09 | syscall-emul: Ignore unimplemented system calls | Brandon Potter |
2017-03-09 | syscall-emul: Rewrite system call exit code | Brandon Potter |