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Age
Commit message (
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Author
2014-01-24
mem: track per-request latencies and access depths in the cache hierarchy
Matt Horsnell
2014-01-24
config: Make the Clock a Tick parameter like Latency/Frequency
Andreas Hansson
2014-01-24
x86: Fix memory leak in table walker
Andreas Hansson
2014-01-24
cpu: Relax check on squashed non-speculative instructions
Andreas Hansson
2014-01-24
cpu: remove faulty simpoint basic block inst count assertion
Dam Sunwoo
2014-01-17
ruby: remove unused label no_vector
Nilay Vaish
2014-01-10
ruby: move all statistics to stats.txt, eliminate ruby.stats
Nilay Vaish
2014-01-10
stats: add function for adding two histograms
Nilay Vaish
2014-01-09
ruby: fix bug introduced to revision 8523754f8885
Nilay Vaish
2014-01-08
ruby: slicc: remove variable 'addr' used in calls to doTransition
Nilay Vaish
2014-01-04
ruby: add a three level MESI protocol.
Nilay Vaish
2014-01-04
ruby: rename MESI_CMP_directory to MESI_Two_Level
Nilay Vaish
2014-01-04
ruby: add support for clusters
Nilay Vaish
2014-01-04
ruby: some small changes
Nilay Vaish
2014-01-03
python: provide better error message for wrapped C++ methods
Steve Reinhardt
2014-01-03
python: don't die on assignment to cloned object
Steve Reinhardt
2013-12-29
sim: Add support for dynamic frequency scaling
Christopher Torng
2013-12-29
mips: Floating point convert bug fix
Christopher Torng
2013-12-26
ruby: fix bugs in mesi cmp directory protocol
Nilay Vaish
2013-12-20
ruby: slicc: replace max_in_port_rank with number of inports
Nilay Vaish
2013-12-20
ruby: declare variables to be unsigned in Address.hh
Nilay Vaish
2013-12-20
ruby: mesi: remove owner and sharer fields from directory tags
Nilay Vaish
2013-12-03
sim: reset stats after startup
Nilay Vaish
2013-12-03
cpu: call BaseCPU startup() function in o3 cpu
Nilay Vaish
2013-11-29
base: Fix race in PollQueue and remove SIGALRM workaround
Andreas Sandberg
2013-11-29
base: Clean up signal handling
Andreas Sandberg
2013-11-26
sim: correct ticksToCycles() function.
Nilay Vaish
2013-10-15
kvm: Set the perf exclude_host attribute if available
Andreas Sandberg
2013-11-26
x86: Implementation of Int3 and Int_Ib in long mode
Christian Menard
2013-11-26
kvm: Remove the unused hostFreq member from BaseKvmCPU
Andreas Sandberg
2013-11-25
sim: simulate with multiple threads and event queues
Steve Reinhardt ext:(%2C%20Nilay%20Vaish%20%3Cnilay%40cs.wisc.edu%3E%2C%20Ali%20Saidi%20%3CAli.Saidi%40ARM.com%3E)
2013-11-15
cpu: allow the fetch buffer to be smaller than a cache line
Anthony Gutierrez
2013-11-15
cpu: Fix Checker register index use
Andreas Hansson
2013-11-14
tests: suppress output on switcheroo tests
Steve Reinhardt
2013-11-12
sim: fix event priority name for debug-start option
Anthony Gutierrez
2013-11-01
mem: Fixes for DRAM stats accounting
Andreas Hansson
2013-11-01
mem: Fix the LPDDR3 page size
Andreas Hansson
2013-11-01
mem: Adding stats for DRAM power calculation
Neha Agarwal
2013-11-01
mem: Unify request selection for read and write queues
Neha Agarwal
2013-11-01
mem: Add a simple adaptive version of the open-page policy
Andreas Hansson
2013-11-01
mem: Just-in-time write scheduling in DRAM controller
Neha Agarwal
2013-11-01
mem: Add tRRD as a timing parameter for the DRAM controller
Andreas Hansson
2013-11-01
mem: Less conservative tRAS in DRAM configurations
Andreas Hansson
2013-11-01
mem: Make tXAW enforcement less conservative and per rank
Ani Udipi
2013-11-01
mem: Fix for 100% write threshold in DRAM controller
Neha Agarwal
2013-11-01
mem: Pick the next DRAM request based on bank availability
Andreas Hansson
2013-11-01
mem: Use the same timing calculation for DRAM read and write
Ani Udipi
2013-11-01
mem: Fix DRAM bank occupancy for streaming access
Ani Udipi
2013-11-01
mem: Schedule time for DRAM event taking tRAS into account
Ani Udipi
2013-11-01
mem: Add tRAS parameter to the DRAM controller model
Ani Udipi
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