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I was asserting that the only reason you would defer targets is if
a write came in while you had an outstanding read miss, but there's
another case where you could get a read access after you've snooped
an invalidation and buffered it because it applies to a prior
outstanding miss.
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"behind" the pci config magic ports.
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classes.
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variant of iret.
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Instead of computing the segment descriptor address, this now checks if a
selector value/descriptor are legal for a particular purpose.
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than one register is accessed at a time.
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memory microcode.
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--HG--
extra : convert_revision : 8fb7d5fad5cb840f69c31aa8b331dbe09e46ee9d
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--HG--
extra : convert_revision : 26e3edef06d6f82aaf162825c151d18faadd6e72
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Make OutputDirectory::resolve() private and change the functions using
resolve() to instead use create().
--HG--
extra : convert_revision : 36d4be629764d0c4c708cec8aa712cd15f966453
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--HG--
extra : convert_revision : d3656ab1e3c18251d4bcf6f5a31103d4b2dfdc43
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