| Age | Commit message (Expand) | Author |
|---|
| 2012-01-17 | MEM: Remove the notion of the default port | Andreas Hansson |
| 2012-01-17 | MEM: Simplify ports by removing EventManager | Andreas Hansson |
| 2012-01-17 | CPU: Moving towards a more general port across CPU models | Andreas Hansson |
| 2012-01-17 | MEM: Add port proxies instead of non-structural ports | Andreas Hansson |
| 2012-01-17 | Ruby: Change the access permissions for MOESI hammer | Andreas Hansson |
| 2012-01-17 | MEM: Add the system port as a central access point | Andreas Hansson |
| 2012-01-17 | MEM: Differentiate functional cache accesses from CPU and memory | Andreas Hansson |
| 2012-01-16 | Alpha: warn_once about broken PAL breakpoints. | Steve Reinhardt |
| 2012-01-16 | debug: fix AllFlags::disable() | Steve Reinhardt |
| 2012-01-12 | inorder: MDU deadlock fix | Maximilien Breughe |
| 2012-01-12 | mips: compatibility between MIPS_SE and cross compiler from CodeSorcery | Deyuan Guo |
| 2012-01-12 | mips: Fix bugs in faults.cc/hh and tlb.cc for MIPS_FS | Deyuan Guo |
| 2012-01-12 | mips: Fix decoder of two float-convert instructions | Deyuan Guo |
| 2012-01-12 | mips: definition of MIPS64_QNAN in registers.hh | Deyuan Guo |
| 2012-01-12 | PerfectCacheMemory: Remove references to CacheMsg | Nilay Vaish |
| 2012-01-11 | Packet: Put back part of the assert | Ali Saidi |
| 2012-01-11 | Packet: Remove meaningless assert statement | Ali Saidi |
| 2012-01-11 | Ruby: Resurrect Cache Warmup Capability | Nilay Vaish |
| 2012-01-11 | Ruby Debug Flags: Remove one, add another | Nilay Vaish |
| 2012-01-11 | Ruby Port: Add a list of cpu ports attached to this port | Nilay Vaish |
| 2012-01-11 | Ruby EventQueue: Remove unused functions | Nilay Vaish |
| 2012-01-11 | Ruby Sparse Memory: Add function for collating blocks | Nilay Vaish |
| 2012-01-11 | Ruby: Add infrastructure for recording cache contents | Nilay Vaish |
| 2012-01-11 | Ruby Memory Vector: Functions for collating and populating pages | Nilay Vaish |
| 2012-01-10 | Ruby: remove the files related to the tracer | Nilay Vaish |
| 2012-01-10 | MOESI Hammer: Remove a couple of bugs | Nilay Vaish |
| 2012-01-10 | Sparse Memory: Simplify the structure for an entry | Nilay Vaish |
| 2012-01-10 | Automated merge with ssh://repo.gem5.org/gem5 | Ali Saidi |
| 2012-01-10 | config: Fix json output for Python lt 2.6. | Ali Saidi |
| 2012-01-10 | DPRINTF: Improve some dprintf messages. | Nilay Vaish |
| 2012-01-09 | X86: Add memory fence to I/O instructions | Nilay Vaish |
| 2012-01-09 | CPU: Remove Alpha-specific PC alignment check. | Anders Handler |
| 2012-01-09 | Config: Fix issue with JSON output | Ali Saidi |
| 2012-01-09 | Packet: Add derived class FunctionalPacket to enable partial functional reads | Geoffrey Blake |
| 2012-01-09 | stats: fix Vector2d to display stats correctly when y_subname is not specified. | Dam Sunwoo |
| 2012-01-09 | sim: Enable sampling of run-time for code-sections marked using pseudo insts. | Prakash Ramrakhyani |
| 2012-01-09 | O3: Remove some asserts that no longer seem to be valid. | Ali Saidi |
| 2012-01-09 | config: support outputing a pickle of the configuration tree | Ali Saidi |
| 2012-01-09 | mem: Change DPRINTF prints more useful destination port number. | Min Kyu Jeong |
| 2012-01-09 | O3: Add support of function tracing with O3 CPU. | Ali Saidi |
| 2012-01-09 | ARM: Add support for running multiple systems | Ali Saidi |
| 2012-01-09 | ARM: Add support for initparam m5 op | Ali Saidi |
| 2012-01-09 | Base: Fixed shift amount in genrand() to work with large numbers | Dam Sunwoo |
| 2012-01-09 | SWIG: Make gem5 compile and link with swig 2.0.4 | Andreas Hansson |
| 2012-01-09 | MAC: Make gem5 compile and run on MacOSX 10.7.2 | Andreas Hansson |
| 2012-01-07 | Ruby Cache: Add param for marking caches as instruction only | Nilay Vaish |
| 2012-01-06 | AbstractController: Remove some of the unused functions | Nilay Vaish |
| 2012-01-06 | Ruby Set: Move NUMBER_WORDS_PER_SET to Set.hh | Nilay Vaish |
| 2012-01-05 | eventq: add a function for replacing head of the queue | Nilay Vaish |
| 2012-01-05 | MESI Coherence Protocol: Fix L2 miss statistics | Nilay Vaish |
