Age | Commit message (Expand) | Author |
2016-12-23 | sim: Fix SE mode checkpoint restore file handling | Joel Hestness |
2016-12-21 | cpu: implement an L-TAGE branch predictor | Arthur Perais |
2016-12-21 | cpu: disallow speculative update of branch predictor tables (o3) | Arthur Perais |
2016-12-21 | cpu: correct comments in tournament branch predictor | Arthur Perais |
2016-12-21 | cpu: Resolve targets of predicted 'taken' decode for O3 | Arthur Perais |
2016-12-21 | cpu: Clarify meaning of cachePorts variable in lsq_unit.hh of O3 | Arthur Perais |
2016-12-20 | ruby: Make MessageBuffers actually finite sized | Joel Hestness |
2016-12-20 | ruby: fix typo in DMASequencer::ackCallback() | Tony Gutierrez |
2016-12-20 | ruby: fix issue with unused var in DMASequencer | Tony Gutierrez |
2016-12-19 | arm: provide correct timer availability in ID_PFR1 register | Curtis Dunham |
2016-12-19 | arm: compute ID_AA64PFR{0,1}_EL1 registers | Curtis Dunham |
2016-12-19 | arm: compute ID_PFR{0,1} registers | Curtis Dunham |
2016-12-19 | arm: miscreg refactoring | Curtis Dunham |
2016-12-19 | arm: audit SCTLR | Curtis Dunham |
2016-12-19 | arm: remove SCTLR.FI | Curtis Dunham |
2016-12-19 | arm: update AArch{64,32} register mappings | Curtis Dunham |
2016-12-19 | mem: Make the BaseXBar public to not confuse Python wrappers | Andreas Sandberg |
2016-12-19 | python: Export periodicStatDump | Andreas Sandberg |
2016-12-19 | dev: Include DmaDevice in NULL builds | Andreas Sandberg |
2016-12-19 | python: Fix incorrect header in the DmaDevice wrapper | Andreas Sandberg |
2016-12-19 | sim: Remove redundant buildEnv import | Andreas Sandberg |
2016-12-15 | ruby: Detect garnet network-level deadlock. | Jieming Yin |
2016-11-09 | base: remove header file to prevent a macro name collision | Brandon Potter |
2016-12-15 | syscall_emul: implement fallocate | Brandon Potter |
2016-12-15 | syscall_emul: add support for x86 statfs system calls | Brandon Potter |
2016-12-15 | syscall_emul: extend sysinfo system call to include mem_unit | Brandon Potter |
2016-12-06 | dev: Fix race conditions at terminating dist-gem5 simulations | Gabor Dozsa |
2016-12-05 | ruby: Remove RubyMemoryControl and associated files | Andreas Hansson |
2016-12-05 | mem: Respond to InvalidateReq when the block is (pending) dirty | Nikos Nikoleris |
2016-12-05 | mem: Invalidate a blk when servicing the 1st invalidating target | Nikos Nikoleris |
2016-12-05 | mem: Allow non invalidating snoops on an InvalidateReq MSHR | Nikos Nikoleris |
2016-12-05 | mem: Don't use hasSharers in the snoopFilter for memory responses | Nikos Nikoleris |
2016-12-05 | mem: Always use InvalidateReq to service WriteLineReq misses | Nikos Nikoleris |
2016-12-05 | mem: Assert that the responderHadWritable is set only once | Nikos Nikoleris |
2016-12-05 | mem: Ensure InvalidateReq is considered isForward by MSHRs | Andreas Hansson |
2016-12-05 | mem: Make packet debug printing more uniform | Nikos Nikoleris |
2016-12-05 | cpu: Change traffic generators to use different values for writes | Nikos Nikoleris |
2016-12-05 | mem: Service only the 1st FromCPU MSHR target on ReadRespWithInv | Nikos Nikoleris |
2016-12-05 | mem: Keep track of allocOnFill in the TargetList | Nikos Nikoleris |
2016-12-05 | mem: Add support for repopulating the flags of an MSHR TargetList | Nikos Nikoleris |
2016-12-02 | hsail: disable asserts to allow immediate operands i.e. 0 with loads | Brandon Potter |
2016-12-02 | hsail: add stub type and stub out several instructions | Brandon Potter |
2016-12-02 | hsail: add popcount type and generate popcount instructions | Brandon Potter |
2016-12-02 | hsail: add a wavesize case statement to register operand code | Brandon Potter |
2016-12-02 | hsail: generate mov instructions for more arith_types and bit_types | Brandon Potter |
2016-12-02 | hsail: remove the panic guarding function directives | Brandon Potter |
2016-12-02 | hsail: fix unsigned offset bug in address calculation | Tony Gutierrez |
2016-12-02 | ruby: Fix overflow reported by ASAN in MessageBuffer. | Matthew Poremba |
2016-11-30 | riscv: [Patch 7/5] Corrected LRSC semantics | Alec Roelke |
2016-11-30 | riscv: [Patch 6/5] Improve Linux emulation for RISC-V | Alec Roelke |