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AgeCommit message (Expand)Author
2011-05-04CPU: Add some useful debug message to the timing simple cpu.Ali Saidi
2011-05-04CPU: Fix a case where timing simple cpu faults can nest.Ali Saidi
2011-05-04O3: Remove assertion for case that is actually handled in code.Ali Saidi
2011-05-04Core: Add some documentation about the sim clocks.Ali Saidi
2011-05-04RealView: Fix the 24 and 100MHz clocks which were providing incorrect values.Chris Emmons
2011-05-04O3: Fix a small corner case with the lsq hazard detection logic.Ali Saidi
2011-05-04ARM: Add vfpv3 support to native trace.Ali Saidi
2011-05-04ARM: Fix small bug with vcvt instructionAli Saidi
2011-05-04debug: fix help outputNathan Binkert
2011-05-02ruby: dbg: use system ticks instead of cyclesKorey Sewell
2011-04-28network: set the ExtLink bw to 16 bytesBrad Beckmann
2011-04-28garnet: removed flit_width from RoutersBrad Beckmann
2011-04-28network: adjusted default endpoint bandwidthBrad Beckmann
2011-04-28network: removed the unused network-wide latency paramBrad Beckmann
2011-04-28network: moved network config paramsBrad Beckmann
2011-04-28network: basic link bw for garnet and simple networksBrad Beckmann
2011-04-28network: convert links & switches to first class C++ SimObjectsBrad Beckmann
2011-04-28garnet: cleaned up flexible network header fileBrad Beckmann
2011-04-28ruby: moved topology to the top network directoryBrad Beckmann
2011-04-28ruby: removed dated comment in SimpleNetworkBrad Beckmann
2011-04-28event: fix PythonEventNathan Binkert
2011-04-25base: include types.hh in base/stats/mysql.hhNilay Vaish
2011-04-23X86: When decoding a memory only inst, fault on reg encodings, don't assert.Gabe Black
2011-04-20stats: ensure that stat names are validNathan Binkert
2011-04-20stats: one more name violationNathan Binkert
2011-04-20fix some build problems from prior changesetsNathan Binkert
2011-04-20stats: add user settable separator string for arrayed statsBrad Danofsky
2011-04-20scons: Allow the build directory live under an EXTRAS directoryBrad Danofsky
2011-04-19stats: rename stats so they can be used as python expressionsNathan Binkert
2011-04-19python: different import for dealing with demandimportNathan Binkert
2011-04-15unittest: Make unit tests capable of using swig and python, convert stattestNathan Binkert
2011-04-15python: cleanup python code so stuff doesn't automatically happen at startupNathan Binkert
2011-04-15scons: make a flexible system for guarding source filesNathan Binkert
2011-04-15trace: reimplement the DTRACE function so it doesn't use a vectorNathan Binkert
2011-04-15debug: create a Debug namespaceNathan Binkert
2011-04-15includes: fix up code after sortingNathan Binkert
2011-04-15includes: sort all includesNathan Binkert
2011-04-15region: add a utility class for keeping track of regions of some rangeNathan Binkert
2011-04-15SortedDict: add functions for getting ranges of keys, values, itemsNathan Binkert
2011-04-15python: figure out if the m5.internal package exists even with demandimportNathan Binkert
2011-04-13refcnt: Update doxygen commentsNathan Binkert
2011-04-13refcnt: Inline comparison functionsNathan Binkert
2011-04-13main: separate out interact() so it can be used by other functionsNathan Binkert
2011-04-10ARM: Fix checkpoint restoration in ARM_SE.Ali Saidi
2011-04-10ARM: Get rid of some comments/todos that no longer apply.Ali Saidi
2011-04-06ruby: fixes to support more types of RubyRequestsBrad Beckmann
2011-04-04ARM: Include IDE/CF controller by default in PBX model.Ali Saidi
2011-04-04ARM: Use CPU local lock before sending load to mem system.Ali Saidi
2011-04-04ARM: Fix checkpoint restoration into O3 CPU and the way O3 switchCpu works.Ali Saidi
2011-04-04ARM: Fix bug in MicroLdrNeon templates for initiateAcc().Ali Saidi
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