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AgeCommit message (Expand)Author
2012-08-25MESI Protocol: Correct the virtual network in profile functionsNilay Vaish
2012-08-25MESI Coherence Protocol: Add copyright noticeNilay Vaish
2012-08-22DMA: Refactor the DMA device and align timing and atomicAndreas Hansson
2012-08-22Packet: Remove NACKs from packet and its use in endpointsAndreas Hansson
2012-08-22Bridge: Remove NACKs in the bridge and unify with packet queueAndreas Hansson
2012-08-22Port: Extend the QueuedPort interface and use where appropriateAndreas Hansson
2012-08-21Device: Remove overloaded pio_latency parameterAndreas Hansson
2012-08-21CPU: Remove overloaded function_trace_start parameterAndreas Hansson
2012-08-21PacketQueue: Allow queuing in the same tick as desired send tickAndreas Hansson
2012-08-21EventManager: Remove test for NULL pointer in constructorAndreas Hansson
2012-08-21Clock: Make Tick unsigned and remove UTickAndreas Hansson
2012-08-21Clock: Move the clock and related functions to ClockedObjectAndreas Hansson
2012-08-19Ruby Banked Array: add copyrightsNilay Vaish
2012-08-16Ruby: Add RubySystem parameter to MemoryControlJason Power
2012-08-16Alpha System: override startup(), instead of loadState()Nilay Vaish
2012-08-15O3,ARM: fix some problems with drain/switchout functionality and add Drain DP...Anthony Gutierrez
2012-08-15sysemul: bump all linux versions of for syscal emulation to 3.0.Ali Saidi
2012-08-10Ruby: Clean up topology changesJason Power
2012-08-08System: set kernel to null, if unspecified.Nilay Vaish
2012-08-06syscall emulation: Enabled getrlimit and getrusage for x86.Marc Orr
2012-08-06SETranslatingPortProxy: fix bug in tryReadString()Steve Reinhardt
2012-08-06process: add progName() virtual functionSteve Reinhardt
2012-08-06syscall_emul: clean up open() code a bit.Steve Reinhardt
2012-08-06str: add an overloaded startswith() utility methodSteve Reinhardt
2012-08-06syscall emulation: Clean up ioctl handling, and implement for x86.Marc Orr
2012-08-01Ruby NetDest: add assert for bad element in netdestJason Power
2012-07-27dma: remove unused variableAnthony Gutierrez
2012-07-27checker: make checker cpu id match its host's cpu idAnthony Gutierrez
2012-07-27cache: don't allow dirty data in the i-cacheAnthony Gutierrez
2012-07-27ARM: fix value of MISCREG_CTR returned by readMiscReg()Anthony Gutierrez
2012-07-23Bridge: Use EventWrapper instead of Event subclass for sendEventAndreas Hansson
2012-07-22X86 CPUID: Return false if unknown processor familyNilay Vaish
2012-07-12Mem: Make SimpleMemory single portedAndreas Hansson
2012-07-12Ruby: remove config information from ruby.statsNilay Vaish
2012-07-12Ruby: remove some unused stuff from SLICC filesNilay Vaish
2012-07-11x86: added page size in bytes tlb entry functionBrad Beckmann
2012-07-11ruby: improved DRAM reset commentBrad Beckmann
2012-07-10syscall emulation: Add the futex system call.Marc Orr
2012-07-10x86: logSize and lruSeq are now optional ckpt paramsBrad Beckmann
2012-07-10Add hook to call map() on Process from python.Steve Reinhardt
2012-07-10# User Brad Beckmann <Brad.Beckmann@amd.com>Brad Beckmann
2012-07-10ruby: remove the cpu assumptions for the random testerBrad Beckmann
2012-07-10# User Brad Beckmann <Brad.Beckmann@amd.com>Brad Beckmann
2012-07-10imported patch jason/slicc-external-structure-fixBrad Beckmann
2012-07-10ruby: banked cache array resource modelBrad Beckmann
2012-07-10ruby: tag and data cache access supportJoel Hestness
2012-07-10ruby: adds reset function to Ruby memory controllersNuwan Jayasena
2012-07-10ruby: memory controllers now inherit from an abstract "MemoryControl" classNuwan Jayasena
2012-07-10cpu: added assertions to ensure the correct proxies are usedBrad Beckmann
2012-07-10ruby: changes how Topologies are createdBrad Beckmann
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