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AgeCommit message (Expand)Author
2015-09-04mem: Tidy up CacheSetAndreas Hansson
2015-09-04mem: Tidy up the snoop state-transition logicAndreas Hansson
2015-09-04sim: Fix time unit in abort messageAndreas Hansson
2015-09-02sim: tag-based checkpoint versioningCurtis Dunham
2015-09-02sim: support checkpointing std::set<std::string>'sCurtis Dunham
2015-09-02sim: make warning for absent optional parameters optionalCurtis Dunham
2015-09-01ruby: remove random seedNilay Vaish
2015-09-01ruby: directory memory: drop unused variable.Nilay Vaish
2015-09-01sim: Remove broken AutoSerialize support from the event queueAndreas Sandberg
2015-09-01dev: Remove auto-serialization dependency in EtherLinkAndreas Sandberg
2015-09-01sim: Remove autoserialize support for exit eventsAndreas Sandberg
2015-09-01sim: Remove unused SerializeBuilder interfaceAndreas Sandberg
2015-09-01sim: Replace fromInt/fromSimObject with decltypeAndreas Sandberg
2015-09-01sim: Move SimObject resolver to sim_object.hhAndreas Sandberg
2015-08-30ruby: specify number of vnets for each protocolNilay Vaish
2015-08-30ruby: network: drop member m_in_useNilay Vaish
2015-08-30ruby: garnet: mark few functions const in BaseGarnetNetwork.hhNilay Vaish
2015-08-30ruby: slicc: avoid duplicate code for function argument checkNilay Vaish
2015-08-29ruby: eliminate type uint64 and int64Nilay Vaish
2015-08-28ruby: Use the const serialize interface in RubySystemAndreas Sandberg
2015-08-27ruby: handle llsc accesses through CacheEntry, not CacheMemoryNilay Vaish
2015-08-26cpu: quiesce pseudoinsts: Always do full quiesceEmilio Castillo
2015-08-24mem: Revert requirement on packet addr/size always validAndreas Hansson
2015-08-21mem: Reflect that packet address and size are always validAndreas Hansson
2015-08-21arm, mem: Remove unused CLEAR_LL request flagAndreas Hansson
2015-08-21mem: Remove unused cache squash functionalityAndreas Hansson
2015-08-21mem: Add explicit Cache subclass and make BaseCache abstractAndreas Hansson
2015-08-21ruby: Move Rubys cache class from Cache.py to RubyCache.pyAndreas Hansson
2015-08-21mem: Move cache_impl.hh to cache.ccAndreas Hansson
2015-08-21cpu: Move invldPid constant from Request to BaseCPUAndreas Hansson
2015-08-19ruby: reverts to changeset: bf82f1f7b040Nilay Vaish
2015-08-14ruby: add accessor functions to SLICC def of MachineIDNilay Vaish
2015-08-14ruby: simple network: refactor codeNilay Vaish
2015-08-14ruby: profiler: provide the number of vnets through ruby systemNilay Vaish
2015-08-14ruby: directory memory: drop unused variable.Nilay Vaish
2015-08-14ruby: slicc: remove a stray line in StateMachine.pyNilay Vaish
2015-08-14ruby: garnet: flexible: refactor flitNilay Vaish
2015-08-14ruby: DataBlock: adds a commentNilay Vaish
2015-08-14ruby: remove random seedNilay Vaish
2015-08-14ruby: SubBlock: refactor codeNilay Vaish
2015-08-14ruby: cache recorder: move check on block size to RubySystem.Nilay Vaish
2015-08-14ruby: abstract controller: mark some variables as constNilay Vaish
2015-08-14ruby: simple network: store Switch* in PerfectSwitch and ThrottleNilay Vaish
2015-08-14ruby: remove unused functionalRead() function.Nilay Vaish
2015-08-14ruby: perfect switch: refactor codeNilay Vaish
2015-08-14ruby: cache memory: drop {try,test}CacheAccess functionsNilay Vaish
2015-08-14ruby: call setMRU from L1 controllers, not from sequencerNilay Vaish
2015-08-14ruby: adds set and way indices to AbstractCacheEntryNilay Vaish
2015-08-14ruby: eliminate type uint64 and int64Nilay Vaish
2015-08-14ruby: slicc: use default argument valueNilay Vaish
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