Age | Commit message (Expand) | Author |
2017-11-17 | sim: Implement load_addr_mask auto-calculation | Geoffrey Blake |
2017-11-16 | sim: ScopedMigration does nothing if both eqs are the same | Tiago Muck |
2017-11-16 | ext, mem: Pull DRAMPower SHA 90d6290 and rebase | Radhika Jagtap |
2017-11-16 | pwr: Enable multiple power models per component | David Guillen Fandos |
2017-11-16 | arch, arm: Print value being ignored on DummyISA write | Sean McGoogan |
2017-11-16 | sim: Clocked object debug message updated for clarity | Tiago Muck |
2017-11-16 | sim: Add an option to load additional kernel objects | Andreas Sandberg |
2017-11-15 | arch-arm: Dsb instruction shouldn't flush the pipeline | Giacomo Travaglini |
2017-11-15 | arch-arm: Writes to DCCMVAC shouldn't flush pipeline | Giacomo Travaglini |
2017-11-15 | arch-arm: Removing FlushPipe fault, using SquashAfter | Giacomo Travaglini |
2017-11-15 | arm: Add support for armv8 CRC32 instructions | Giacomo Travaglini |
2017-11-14 | cpu, probe: Fix elastic trace register dependency | Radhika Jagtap |
2017-11-13 | config: Add an Energy param type. | Gabe Black |
2017-11-13 | config: Export the "Current" param type from m5.params. | Gabe Black |
2017-11-13 | util: Add a "toEnergy" function to the convert module. | Gabe Black |
2017-11-13 | config: Simplify the definitions of the Voltage and Current params. | Gabe Black |
2017-11-13 | arch-arm: Interface for the ArmStaticInst intWidth field | Giacomo Travaglini |
2017-11-13 | arch-arm: Corrected encoding for T32 HVC instruction | Giacomo Travaglini |
2017-11-13 | util: Simplify/consolidate the python conversion module. | Gabe Black |
2017-11-10 | scons: Move Transform and termcap functionality into their own files. | Gabe Black |
2017-11-09 | mem: Align the snoop behavior in the XBar for atomic and timing | Nikos Nikoleris |
2017-11-09 | arch-arm: Allow dc ivac from EL0 when SCTLR_EL1.UCI=1 | Nikos Nikoleris |
2017-11-08 | dev: Move generic serial devices to src/dev/serial | Andreas Sandberg |
2017-11-08 | dev: Add a dummy serial device | Andreas Sandberg |
2017-11-08 | dev: Refactor UART->Terminal interface | Andreas Sandberg |
2017-11-07 | alpha,arm,mips,power,riscv,sparc,x86: Merge exec decl templates. | Gabe Black |
2017-11-06 | sim-se: Add prlimit system call | Alec Roelke |
2017-11-02 | alpha,arm,mips,power,riscv,sparc,x86,isa: De-specialize ExecContexts. | Gabe Black |
2017-10-31 | dev: Using Configurable image writer in HDLcd | Giacomo Travaglini |
2017-10-31 | vnc: Default image writer type set to Auto | Giacomo Travaglini |
2017-10-31 | base: Introducing utility for writing raw data in png format | Giacomo Travaglini |
2017-10-31 | x86: Fix VEX instruction decoding. | Gabe Black |
2017-10-30 | base: Fix forcing loopback only binding for listeners. | Gabe Black |
2017-10-20 | arch-arm: RBIT instruction using mirroring func | Giacomo Travaglini |
2017-10-20 | base: Function for mirroring bits in variable length word | Giacomo Travaglini |
2017-10-20 | base: Defining make_unique for C++11 | Giacomo Travaglini |
2017-10-19 | cpu-o3: Add M5_VAR_USED to variable | Jason Lowe-Power |
2017-10-19 | scons: Fix the regression tests. | Gabe Black |
2017-10-17 | scons: Stop generating inc.d in the isa parser. | Gabe Black |
2017-10-17 | arch-arm: Fix inverted 32/64-bit check in GDB | Boris Shingarov |
2017-10-13 | arch-arm: Signal an event when executing store exclusives | Nikos Nikoleris |
2017-10-13 | mem: Signal the local monitor when clearing the global monitor | Nikos Nikoleris |
2017-10-13 | cpu-o3: Check predication before the SQ size for a debug print | Nikos Nikoleris |
2017-10-13 | cpu-o3: Avoid early checker verification for store conditionals | Nikos Nikoleris |
2017-09-28 | sim-se: Fix mremap for downward growing mmap regions | Rico Amslinger |
2017-09-27 | arch-x86: fix CondInst decoding for MOV to Control Registers | Bjoern A. Zeeb |
2017-09-27 | arch: change panic for Vector traceData to warn_once | Bjoern A. Zeeb |
2017-09-27 | sim: make compile on FreeBSD prior to 11 | Bjoern A. Zeeb |
2017-09-26 | util: Make dot_writer ignore NULL simobjects. | Gabe Black |
2017-09-26 | dev: Make the IDE controller handle NULL simobject pointers. | Gabe Black |