summaryrefslogtreecommitdiff
path: root/src
AgeCommit message (Expand)Author
2018-03-12arch-arm: Implement missing aarch32 TLBI registersGiacomo Travaglini
2018-03-09mem-cache: Use CacheBlk parameter on address regenerationDaniel R. Carvalho
2018-03-08mem-cache: Fix missing overridesJason Lowe-Power
2018-03-08sparc: Passify a new g++ warning.Gabe Black
2018-03-08arch-arm: Enable Debug IFSC when faulting to aarch64 modeGiacomo Travaglini
2018-03-08arch-arm: Fix FSC generation in AbortFaultGiacomo Travaglini
2018-03-08arch-arm: Introduce update method in ArmFault classGiacomo Travaglini
2018-03-08arch-arm: Fix PCAlignmentFault routing to HypervisorGiacomo Travaglini
2018-03-07mem-cache: Make the block invalidate functions virtualNikos Nikoleris
2018-03-07mem-cache: Make invalidate a common function between tag classesNikos Nikoleris
2018-03-07mem-cache: Allow prefetchers to override setCache.Xiaoyu Ma
2018-03-06scons: Switch from the print statement to the print function.Gabe Black
2018-03-06dev: Don't fall through into BRAR after RFDR caseSiddhesh Poyarekar
2018-03-06arm: Remove ignored const qualifierSiddhesh Poyarekar
2018-03-06dev: Leave last byte in strncpy for NULLSiddhesh Poyarekar
2018-03-06mem-cache: Fix bug generated by 8282Daniel R. Carvalho
2018-03-06mem-cache: Populate whenReady for blocks filled from writebacksNikos Nikoleris
2018-03-06mem-cache: Use findBlock() in accessBlock()Daniel R. Carvalho
2018-03-05mem-cache: Remove redundant block initialization on allocationNikos Nikoleris
2018-03-02mem-cache: Remove mumBlock redundant initialiation from FALRUNikos Nikoleris
2018-03-02mem-cache: Populate the secure bit when the temp block is filledNikos Nikoleris
2018-03-02mem-cache: Remove unnecessary block initialization on writebackNikos Nikoleris
2018-03-01mem-cache: Remove extra block init in BaseSetAssocDaniel R. Carvalho
2018-03-01mem-cache: Vectorize C arrays in BaseSetAssoc.Daniel R. Carvalho
2018-02-28sim, power: Temperature used for power calculationsAnouk Van Laer
2018-02-28sim: Added model type to power modelAnouk Van Laer
2018-02-24mem-cache: Fix CacheSet memory leakDaniel R. Carvalho
2018-02-24sparc: Fix FS Checkpoint loadingKhalique
2018-02-20arch-arm: Make hlt64 a mem barrier with semihostingGiacomo Travaglini
2018-02-20arch-arm: Add AArch32 HLT Semihosting interfaceGiacomo Travaglini
2018-02-20arch-arm: Add AArch32 SVC Semihosting interfaceGiacomo Travaglini
2018-02-20arch-arm: Adding isa templates for semihosting opsGiacomo Travaglini
2018-02-20arch-arm: HLT using immediate when checking for semihostingGiacomo Travaglini
2018-02-20arch-arm: Fix Hlt64,Svc64,Hvc64,Smc64,Brk64 disassemblyGiacomo Travaglini
2018-02-20cpu-o3: Don't add non-speculative mem barriers to the IQ twiceAndreas Sandberg
2018-02-19mem: fix page_table bug for .fast buildBrandon Potter
2018-02-19arch-riscv: Fix compressed branch op offsetAlec Roelke
2018-02-19arch-arm: Semihosting not available in syscall emulationGiacomo Travaglini
2018-02-19arch-arm: Add support for secure state in semihostingAndreas Sandberg
2018-02-19mem: Refactor port proxies to support secure accessesAndreas Sandberg
2018-02-19arch-arm: Add aarch64 semihosting supportAndreas Sandberg
2018-02-16arch-arm: IMPLEMENTATION DEFINED registerGiacomo Travaglini
2018-02-16arch-arm: Arch regs and pseudo regs distinctionGiacomo Travaglini
2018-02-16arch-arm: Fix syntax error in TLB::getResultTeChuan Zhu
2018-02-16arch-arm: Fix big endian support in {Load,Store}Double64Chuan Zhu
2018-02-16arch-arm: Fix big endian support in do{Long,L1,L2}DescriptorChuan Zhu
2018-02-16arch-arm: Add support for automatic reset addr selectionAndreas Sandberg
2018-02-16arch-arm: Change ArmFault cast from reinterpret to staticGiacomo Travaglini
2018-02-16arch-arm: Decode Brk64 instructionsAndreas Sandberg
2018-02-16mem: Add PortProxy read/write helper with explicit endiannessAndreas Sandberg
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-16 23:02:51 +0000