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2011-07-11ISA: Get rid of the unused mem_acc_type template parameter.Gabe Black
2011-07-10Branch predictor: Fixes the tournament branch predictor.Mrinmoy Ghosh
Branch predictor could not predict a branch in a nested loop because: 1. The global history was not updated after a mispredict squash. 2. The global history was updated in the fetch stage. The choice predictors that were updated used the changed global history. This is incorrect, as it incorporates the state of global history after the branch in encountered. Fixed update to choice predictor using the global history state before the branch happened. 3. The global predictor table was also updated using the global history state before the branch happened as above. Additionally, parameters to initialize ctr and history size were reversed.
2011-07-10O3: Fix up pipelining icache accesses in fetch stage to function properlyGeoffrey Blake
Fixed up the patch from Yasuko Watanabe that enabled pipelining of fetch accessess to icache to work with recent changes to main repository. Also added in ability for fetch stage to delay issuing the fault carrying nop when a pipeline fetch causes a fault and no fetch bandwidth is available until the next cycle.
2011-07-10IO: Handle case where ISA Fake device is being used as a fake memory.Ali Saidi
2011-07-10O3: Make sure fetch doesn't go off into the weeds during speculation.Ali Saidi
2011-07-10Config: Add support for a Self.all proxy objectAli Saidi
2011-07-10ARM: Fix mp interrupt bug in GIC.Daniel Johnson
Missing "!" made multiprocessor interrupts operate incorrectly.
2011-07-07alpha:hwrei:rollback for o3Korey Sewell
change hwrei back to being a non-control instruction so O3-FS mode will work add squash in inorder that will catch a hwrei (or any other genric instruction) that isnt a control inst but changes the PC. Additional testing still needs to be done for inorder-FS mode but this change will free O3 development back up in the interim
2011-07-06ruby: added generic dma machineBrad Beckmann
2011-07-06MOESI_hammer: Fixed uniprocessor DMA bugBrad Beckmann
2011-07-05slicc: add a protocol statement and an include statementNathan Binkert
All protocols must specify their name The include statement allows any file to include another file.
2011-07-05slicc: cleanup slicc code and make it less verboseNathan Binkert
2011-07-05grammar: better encapsulation of a grammar and parsingNathan Binkert
This makes it possible to use the grammar multiple times and use the multiple instances concurrently. This makes implementing an include statement as part of a grammar possible.
2011-07-05ISAs: Streamline some spots where Mem is used in the ISA descriptions.Gabe Black
2011-07-05ISA parser: Define operand types with a ctype directly.Gabe Black
2011-07-05ISA parser: Simplify operand type handling.Gabe Black
This change simplifies the code surrounding operand type handling and makes it depend only on the ctype that goes with each operand type. Future changes will allow defining operand types by their ctypes directly, convert the ISAs over to that style of definition, and then remove support for the old style. These changes are to make it easier to use non-builtin types like classes or structures as the type for operands.
2011-07-03Merged with Gabe's recent changes.Nilay Vaish
2011-07-03Network_test: Conform it with functional access changes in RubyNilay Vaish
Addition of functional access support to Ruby necessitated some changes to the way coherence protocols are written. I had forgotten to update the Network_test protocol. This patch makes those updates.
2011-07-02ExecContext: Rename the readBytes/writeBytes functions to readMem and writeMem.Gabe Black
readBytes and writeBytes had the word "bytes" in their names because they accessed blobs of bytes. This distinguished them from the read and write functions which handled higher level data types. Because those functions don't exist any more, this change renames readBytes and writeBytes to more general names, readMem and writeMem, which reflect the fact that they are how you read and write memory. This also makes their names more consistent with the register reading/writing functions, although those are still read and set for some reason.
2011-07-02ExecContext: Get rid of the now unused read/write templated functions.Gabe Black
2011-07-02ISA: Use readBytes/writeBytes for all instruction level memory operations.Gabe Black
2011-07-02X86: Fix store microops so they don't drop faults in timing mode.Gabe Black
If a fault was returned by the CPU when a store initiated it's write, the store instruction would ignore the fault. This change fixes that.
2011-07-01Ruby: Commit files missing from previous commitNilay Vaish
The previous commit on functional access support in Ruby did not have some of the files required. This patch adds those files to the repository.
2011-06-30Ruby: Add support for functional accessesBrad Beckmann ext:(%2C%20Nilay%20Vaish%20%3Cnilay%40cs.wisc.edu%3E)
This patch rpovides functional access support in Ruby. Currently only the M5Port of RubyPort supports functional accesses. The support for functional through the PioPort will be added as a separate patch.
2011-06-28arch: print next upc correctlyNilay Vaish
The patch corrects the print statement which prints the current and the next pc. Instead of the next upc, the next pc was being printed.
2011-06-24Ruby: remove unused functions in CacheMemory: get/setMemoryValueJoel Hestness
2011-06-22mips: fix nmsub and nmadd definitionsDeyaun Guo
the -/+ signs were flipped for nmsub_s, nmsub_d, and nmadd_d
2011-06-21X86: Eliminate an unused argument for building store microops.Gabe Black
2011-06-20InOder: Fix a compile error.Gabe Black
2011-06-19inorder: clear reg. dep entry after removing from listKorey Sewell
this will safeguard future code from trying to remove from the list twice. That code wouldnt break but would waste time.
2011-06-19inorder: se: squash after syscallsKorey Sewell
2011-06-19inorder: cleanup dprintfs in cache unitKorey Sewell
2011-06-19inorder: SE mode TLB faultsKorey Sewell
handle them like we do in FS mode, by blocking the TLB until the fault is handled by the fault->invoke()
2011-06-19inorder:tracing: fix fault tracing bugKorey Sewell
2011-06-19inorder: se compile fixesKorey Sewell
2011-06-19inorder: add necessary debug flag header filesKorey Sewell
2011-06-19mips: mark unaligned access flag as trueKorey Sewell
2011-06-19inorder: clear fetchbuffer on trapsKorey Sewell
implement clearfetchbufferfunction extend predecoder to use multiple threads and clear those on trap
2011-06-19inorder: use separate float-reg bits function in dyninstKorey Sewell
this will make sure we get the correct view of a FP register
2011-06-19inorder: use trapPending flag to manage trapsKorey Sewell
2011-06-19inorder/dtb: make sure DTB translate correct addressKorey Sewell
The DTB expects the correct PC in the ThreadContext but how if the memory accesses are speculative? Shouldn't we send along the requestor's PC to the translate functions?
2011-06-19inorder: handle serializing instructionsKorey Sewell
including IPR accesses and store-conditionals. These class of instructions will not execute correctly in a superscalar machine
2011-06-19alpha: fix warn_once for prefetchesKorey Sewell
2011-06-19alpha: naming for dtb faultsKorey Sewell
Just "dfault" gets confusing while debugging. Why not differentiate whether it's an access violation or page fault
2011-06-19inorder: dont handle multiple faults on same cycleKorey Sewell
if a faulting instruction reaches an execution unit, then ignore it and pass it through the pipeline. Once we recognize the fault in the graduation unit, dont allow a second fault to creep in on the same cycle.
2011-06-19inorder: register ports for FS modeKorey Sewell
handle "snoop" port registration as well as functional port setup for FS mode
2011-06-19inorder: check for interrupts each tickKorey Sewell
use a dummy instruction to facilitate the squash after the interrupts trap
2011-06-19inorder: explicit fault checkKorey Sewell
Before graduating an instruction, explicitly check fault by making the fault check it's own separate command that can be put on an instruction schedule.
2011-06-19inorder: squash and trap behind a tlb faultKorey Sewell
2011-06-19inorder: stall stores on store conditionals & compare/swapsKorey Sewell