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Age
Commit message (
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Author
2013-01-07
base: Add support for merging of interleaved address ranges
Andreas Hansson
2013-01-07
mem: Add interleaving bits to the address ranges
Andreas Hansson
2013-01-07
config: Traverse lists when visiting children in all proxy
Andreas Hansson
2013-01-07
base: Simplify the AddrRangeMap by removing unused code
Andreas Hansson
2013-01-07
config: Do not use hardcoded physmem in fs script
Andreas Hansson
2013-01-07
mem: Tidy up bus addr range debug messages
Andreas Hansson
2013-01-07
mem: Skip address mapper range checks to allow more flexibility
Andreas Hansson
2013-01-07
base: Encapsulate the underlying fields in AddrRange
Andreas Hansson
2013-01-07
mem: Remove the joining of neighbouring ranges
Andreas Hansson
2013-01-07
cpu: Share the send functionality between traffic generators
Andreas Hansson
2013-01-07
cpu: Add support for protobuf input for the trace generator
Andreas Hansson
2013-01-07
cpu: Encapsulate traffic generator input in a stream
Andreas Hansson
2013-01-07
base: Add wrapped protobuf input stream
Andreas Hansson
2013-01-07
mem: Add tracing support in the communication monitor
Andreas Hansson
2013-01-07
base: Add wrapped protobuf output streams
Andreas Hansson
2013-01-07
scons: Add support for google protobuf building
Andreas Hansson
2013-01-07
arm: Fix DMA event handling bug in the PL111 model
Andreas Sandberg
2013-01-07
dev: Fix the Pl111 timings by separating pixel and DMA clock
Andreas Hansson
2013-01-07
cpu: Fix the traffic gen read percentage
Andreas Hansson
2013-01-07
mem: Add sanity check to packet queue size
Andreas Hansson
2013-01-07
ruby: Fix missing cxx_header in Switch
Andreas Hansson
2013-01-07
config: Replace second keyboard with a mouse.
Chris Emmons
2013-01-07
mem: Fix a bug in the memory serialization file naming
Andreas Hansson
2013-01-07
arm: Make ID registers ISA parameters
Andreas Sandberg
2013-01-07
arch: Make the ISA class inherit from SimObject
Andreas Sandberg
2013-01-07
o3: Fix issue with LLSC ordering and speculation
Ali Saidi
2013-01-07
cpu: rename the misleading inSyscall to noSquashFromTC
Ali Saidi
2013-01-07
cache: add note about where conflicts are handled
Ali Saidi
2013-01-04
Decoder: Remove the thread context get/set from the decoder.
Gabe Black
2013-01-04
X86: Move address based decode caching in front of the predecoder.
Gabe Black
2013-01-04
SPARC: Keep a copy of the current ASI in the decoder.
Gabe Black
2013-01-04
ARM: Keep a copy of the fpscr len and stride fields in the decoder.
Gabe Black
2012-12-30
x86: implement x87 fp instruction fnstsw
Nilay Vaish
2012-12-30
x86: implement x87 fp instruction fsincos
Nilay Vaish
2012-12-12
arm: set uopSet_uop as conditional or unconditional control
Nathanael Premillieu
2012-12-12
arm: set movret_uop as conditional or unconditional control
Nathanael Premillieu
2012-12-11
ruby: add support for prefetching to MESI protocol
Nilay Vaish
2012-12-11
ruby: modify the directed tester to read/write streams
Nilay Vaish
2012-12-11
ruby: change slicc to allow for constructor args
Nilay Vaish
2012-12-11
ruby: add a prefetcher
Nilay Vaish
2012-12-11
ruby: add functions for computing next stride/page address
Nilay Vaish
2012-12-06
TournamentBP: Fix some bugs with table sizes and counters
Erik Tomusk
2012-12-06
inorder cpu: add missing DPRINTF argument
Malek Musleh
2012-12-06
o3 cpu: remove some unused buggy functions in the lsq
Nathanael Premillieu
2012-11-16
sim: have a curTick per eventq
Nilay Vaish
2012-11-10
ruby: support functional accesses in garnet flexible network
Nilay Vaish
2012-11-10
ruby: bug in functionalRead, revert recent changes
Nilay Vaish
2012-11-08
mem: Fix DRAM draining to ensure write queue is empty
Andreas Hansson
2012-11-02
ruby: reset and dump stats along with reset of the system
Hamid Reza Khaleghzadeh ext:(%2C%20Lluc%20Alvarez%20%3Clluc.alvarez%40bsc.es%3E%2C%20Nilay%20Vaish%20%3Cnilay%40cs.wisc.edu%3E)
2012-11-02
mem: fix use after free issue in memories until 4-phase work complete.
Ali Saidi
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