| Age | Commit message (Expand) | Author |
|---|
| 2007-07-26 | Merge python and x86 changes with cache branch | Nathan Binkert |
| 2007-07-26 | Merge with head. | Gabe Black |
| 2007-07-26 | X86: Fix argument register indexing. | Gabe Black |
| 2007-07-26 | X86: Hook in shift and rotate by one instructions, and NOT. | Gabe Black |
| 2007-07-26 | X86: Fix pc relative versions of add and subtract. | Gabe Black |
| 2007-07-26 | X86: Implement rotate-by-one instructions, and make register rotates use regi... | Gabe Black |
| 2007-07-26 | X86: Implement shift-by-one instructions, and make register shifts use regist... | Gabe Black |
| 2007-07-26 | X86: Add functions to read and write to an exec context. | Gabe Black |
| 2007-07-26 | X86: Fix carry calculation for subtraction based microops. | Gabe Black |
| 2007-07-26 | Add functions for mmap and brk. | Gabe Black |
| 2007-07-26 | Implement NOT | Gabe Black |
| 2007-07-26 | Have owner respond to UpgradeReq to avoid race. | Steve Reinhardt |
| 2007-07-26 | Add downward express snoops for invalidations. | Steve Reinhardt |
| 2007-07-26 | Continue snooping after a writeback is encountered. | Steve Reinhardt |
| 2007-07-26 | bus: Fix default port handling. | Steve Reinhardt |
| 2007-07-25 | Add a new SCons option called EXTRAS that allows you to include stuff in | Nathan Binkert |
| 2007-07-25 | Can't block on memInhibit packets | Steve Reinhardt |
| 2007-07-24 | Integrate snoop loop functions into their respective call sites. | Steve Reinhardt |
| 2007-07-24 | Don't delete request at target... requester still needs it. | Steve Reinhardt |
| 2007-07-24 | Merge with head. | Gabe Black |
| 2007-07-24 | Hook in a bunch of new instructions, fix a few minor bugs, and expand out one... | Gabe Black |
| 2007-07-24 | Add a tgt_iovec structure to support writev, change the name of X86Linux to X... | Gabe Black |
| 2007-07-24 | Add a special case for "test" which needs an immediate even though everything... | Gabe Black |
| 2007-07-24 | The groups of instructions hanging off opcode 71h, 72h, and 73h all need a by... | Gabe Black |
| 2007-07-24 | Make the shift and rotate microops mask the shift/rotate amount correctly. | Gabe Black |
| 2007-07-24 | Fix immediate shifts. Implement register shifts. | Gabe Black |
| 2007-07-24 | Fix immediate rotates and add register ones. | Gabe Black |
| 2007-07-24 | Clean out part of an old comment. | Gabe Black |
| 2007-07-24 | Implement cmov. | Gabe Black |
| 2007-07-24 | Implement cdqe and cqo, which are also called cbw and cwde, and cwd and cdq r... | Gabe Black |
| 2007-07-24 | Implement setcc. | Gabe Black |
| 2007-07-24 | Get rid of an old comment. | Gabe Black |
| 2007-07-24 | Get rid of an old comment | Gabe Black |
| 2007-07-23 | A couple more minor bug fixes for multilevel coherence. | Steve Reinhardt |
| 2007-07-23 | Major changes to how SimObjects are created and initialized. Almost all | Nathan Binkert |
| 2007-07-23 | Implement pusha, popa, three operand imul, hook them into the decoder, and cl... | Gabe Black |
| 2007-07-23 | Fix WriteReq/StoreCondReq setting in O3. | Steve Reinhardt |
| 2007-07-22 | Replace lowerMSHRPending flag with more robust scheme | Steve Reinhardt |
| 2007-07-23 | Make the operand size reflect the size specifier on the operand tags, and imp... | Gabe Black |
| 2007-07-22 | Merge more changes in from head. | Steve Reinhardt |
| 2007-07-22 | Replace DeferredSnoop flag with LowerMSHRPending flag. | Steve Reinhardt |
| 2007-07-22 | Merge Gabe's changes with mine. | Steve Reinhardt |
| 2007-07-22 | A few minor non-debug compilation issues. | Steve Reinhardt |
| 2007-07-22 | Add the "open" syscall. | Gabe Black |
| 2007-07-22 | Fixed immediate byte accounting bug. | Gabe Black |
| 2007-07-22 | Fixed displacement size bug. | Gabe Black |
| 2007-07-21 | Implemented and hooked in xchg, rotate with carry, and ret instructions | Gabe Black |
| 2007-07-21 | Implement rotate with carry microops. | Gabe Black |
| 2007-07-21 | Deal with invalidations intersecting outstanding upgrades. | Steve Reinhardt |
| 2007-07-21 | Several more fixes for multi-level timing coherence. | Steve Reinhardt |
