summaryrefslogtreecommitdiff
path: root/src
AgeCommit message (Expand)Author
2018-04-18arch-arm: Fix FPEXC32_EL2 to FPEXC mappingChuan Zhu
2018-04-18arch-arm: Adding MiscReg Priv (EL1) global flagGiacomo Travaglini
2018-04-18arch-arm: Correct masking of cp10 and cp11 in CPACRChuan Zhu
2018-04-18arch-arm: Using explicit invalidation in TLBGiacomo Travaglini
2018-04-18mem-cache: Revamp multiple size tracking for FALRU cachesNikos Nikoleris
2018-04-18dev, arm: Cleanup Pl050 interrupt handlingAndreas Sandberg
2018-04-17gpu-compute: fix bad asserts in gpu tlb and cu tlb portTony Gutierrez
2018-04-17mem-ruby: enable DPRINTFN calls in slicc for temporary debug printingJohn Alsop
2018-04-17arch-arm: Fix secure MiscReg access when EL3 is not AArch32Giacomo Travaglini
2018-04-17ps2: Unify constant namesAndreas Sandberg
2018-04-17dev, arm: Use the PS/2 framework in the Pl050 modelAndreas Sandberg
2018-04-17ps2: Add proper touchscreen command handlingAndreas Sandberg
2018-04-17ps2: Implement the keyboard reset commandAndreas Sandberg
2018-04-17ps2: Unify device data bufferingAndreas Sandberg
2018-04-17ps2: Add a simple touchscreen modelAndreas Sandberg
2018-04-17ps2: Add VNC support to the keyboard modelAndreas Sandberg
2018-04-17ps2: Factor out PS/2 devices into their own subsystemAndreas Sandberg
2018-04-17mem: Add a helper function to get a word of variable lengthAndreas Sandberg
2018-04-13ruby,gpu-compute: bugfix for GPU_VIPER* protocolsBrandon Potter
2018-04-13ruby: bugfix for MESI_Three_Level protocolBrandon Potter
2018-04-13mem-ruby: fix more style issues in AMD licensesTony Gutierrez
2018-04-13mem-cache: Add MoveToTail to FALRUDaniel R. Carvalho
2018-04-12configs, mem-ruby: fix issues with style in AMD licenseTony Gutierrez
2018-04-10arch-arm: Fix mrc,mcr to cop14 disassembleGiacomo Travaglini
2018-04-10dev: arm: SetScaling commands don't send parameter bytes.Gabe Black
2018-04-06arch: alpha: Fix an 8 year old bug from the transition to pc objects.Gabe Black
2018-04-06arch-arm: Add support for Tarmac trace generationGiacomo Travaglini
2018-04-06arch-arm: Add support for Tarmac trace-based simulationGiacomo Travaglini
2018-04-06arch-arm: Fix AArch32 branch instructions disassembleGiacomo Travaglini
2018-04-06arch-arm: Fix secure write of SCTLR when EL3 is AArch64Giacomo Travaglini
2018-04-06arch-arm: Correct mcrr,mrrc disassembleGiacomo Travaglini
2018-04-06mem: Remove unused 'using namespace'Daniel R. Carvalho
2018-04-06mem-cache: Move insertBlock functionality in FALRUDaniel R. Carvalho
2018-04-06mem-cache: Create LIP Replacement PolicyDaniel R. Carvalho
2018-04-06mem-cache: Create BIP Replacement PolicyDaniel R. Carvalho
2018-04-05mem-cache: Use Packet functions to write data blocksDaniel R. Carvalho
2018-04-05dev: Make sure the EtherTap device uses the right event queue.Gabe Black
2018-03-30base: Make bitunion output functions static/inline.Gabe Black
2018-03-30mem-cache: Remove unused return value from the recvTimingReq funcNikos Nikoleris
2018-03-30mem-cache: Fix FALRU data block seg faultDaniel R. Carvalho
2018-03-30mem-cache: Create LFU replacement policyDaniel R. Carvalho
2018-03-30mem-cache: Create RRIP Replacement PolicyDaniel R. Carvalho
2018-03-30mem-cache: Create BRRIP replacement policyDaniel R. Carvalho
2018-03-28base: Add a default output function for bitunion types.Gabe Black
2018-03-27dev: sparc: Get rid of the TheISA namespace in the SPARC devices.Gabe Black
2018-03-27dev: Remove a bunch of Alpha code from MIPS, and unnecessary TheISAs.Gabe Black
2018-03-27cpu: Remove ExtMachInst typedefs from the O3 CPU model.Gabe Black
2018-03-27arch: cpu: Make the ExtMachInst type a template argument in InstMap.Gabe Black
2018-03-27sparc: Add some missing M5_FALLTHROUGHs and breaks.Gabe Black
2018-03-27cpu: Stop extracting inst_flags from the machInst.Gabe Black
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-26 03:29:34 +0000