Age | Commit message (Expand) | Author |
2015-12-10 | dev: Add missing SConscript in src/dev/i2c | Andreas Sandberg |
2015-12-10 | dev: Move storage devices to src/dev/storage/ | Andreas Sandberg |
2015-12-10 | dev: Move network devices to src/dev/net/ | Andreas Sandberg |
2015-12-10 | dev: Move i2c functionality to src/dev/i2c/ | Andreas Sandberg |
2015-12-10 | dev: Move the CopyEngine class to src/dev/pci | Andreas Sandberg |
2015-12-10 | dev: Move existing PCI device functionality to src/dev/pci | Andreas Sandberg |
2015-11-05 | sim: Disable gzip compression for writefile pseudo instruction | Sascha Bischoff |
2015-09-18 | dev, arm: Add gem5 extensions to support more than 8 cores | Karthik Sangaiah |
2015-12-09 | mem: remove acq/rel cmds from packet and add mem fence req | Tony Gutierrez |
2015-12-09 | syscall_emul: don't check host fd when allocating target fd | Steve Reinhardt |
2015-12-07 | cpu: Support virtual addr in elastic traces | Radhika Jagtap |
2015-12-07 | cpu: Create record type enum for elastic traces | Radhika Jagtap |
2015-12-07 | cpu: Add TraceCPU to playback elastic traces | Radhika Jagtap |
2015-12-07 | mem: Add instruction sequence number to request | Radhika Jagtap |
2015-12-07 | proto, probe: Add elastic trace probe to o3 cpu | Radhika Jagtap |
2015-12-07 | probe: Add probe in Fetch, IEW, Rename and Commit | Radhika Jagtap |
2015-12-05 | dev: Rewrite PCI host functionality | Andreas Sandberg |
2015-12-04 | cpu: fix unitialized variable which may cause assertion failure | Pau Cabre |
2015-12-04 | sim: Get rid of the non-const serialize() method | Andreas Sandberg |
2015-12-04 | arm, config: Automatically discover available platforms | Andreas Sandberg |
2015-12-04 | dev, arm: Disable R/B swap in HDLCD by default | Andreas Sandberg |
2015-12-04 | dev, arm: Split MCC and DCC subsystems | Andreas Sandberg |
2015-12-04 | sim: Add support for generating back traces on errors | Andreas Sandberg |
2015-12-03 | arm: Add support for automatic boot loader selection | Andreas Sandberg |
2015-12-03 | dev, mips: Remove the unused MaltaPChip class | Andreas Sandberg |
2015-12-01 | config: Fix broken SimObject listing | Andreas Sandberg |
2015-11-24 | dev: Remove unnecessary header include | Andreas Sandberg |
2015-11-25 | mem: Fix search-replace issues in DRAMPower wrapper license | Andreas Hansson |
2015-11-22 | config: Added missing types to JSON/INI Python reader | Andrew Bardsley |
2015-11-22 | arm, dev: Fix flash model serialization code typos | Geoffrey Blake |
2015-11-22 | cpu: Fix base FP and CC register index in o3 insertThread() | Nathanael Premillieu |
2015-11-22 | arm: Fix fplib 128-bit shift operators | Nathanael Premillieu |
2015-11-22 | cpu: Fix memory leak in traffic generator | Andreas Hansson |
2015-11-20 | cpu: Enforce 1 interrupt controller per thread | Andreas Sandberg |
2015-11-16 | Merged changesets: 47e2adf7fb1a and b65d4e878ed2 | Nilay Vaish |
2015-11-16 | x86: Invalidating TLB entry on page fault | Swapnil Haria |
2015-11-16 | x86: cpuid: add family to warn() message | Bjoern A. Zeeb |
2015-11-16 | x86: pagetable walker: fix typo in comment | Bjoern A. Zeeb |
2015-11-16 | sparc: Make remote debugging with gdb work | Palle Lyckegaard |
2015-11-16 | o3: drop unused statistic wbPenalized and wbPenalizedRate | Nilay Vaish |
2015-11-15 | arm: Add missing explicit overrides for classic caches | Andreas Sandberg |
2015-07-20 | ruby: added stl vector of ints to be used by SLICC | Brad Beckmann |
2015-11-13 | slicc: fixes for the Address to Addr changeset (11025) | Tony Gutierrez |
2015-11-13 | ruby: add BoolVec | Joe Gross |
2015-07-20 | mem: add boolean to disable PacketQueue's size sanity check | Brad Beckmann |
2015-11-11 | dev, arm: Initialized the iccrpr register in the GIC | Andreas Sandberg |
2015-11-05 | dev: Add basic checkpoint support to VirtIO9PProxy device | Sascha Bischoff |
2015-11-09 | dev: Remove unused header includes | Andreas Sandberg |
2015-11-09 | dev: Don't access the platform directly in PCI devices | Andreas Sandberg |
2015-11-06 | mem: Add an option to perform clean writebacks from caches | Andreas Hansson |