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AgeCommit message (Expand)Author
2010-01-29ruby: added data print to ruby requestBrad Beckmann
2010-01-29ruby: Added atomic support to MOESI_hammerBrad Beckmann
2010-01-29ruby: added the GEMS ruby testerBrad Beckmann
2010-01-29ruby: fixed MOESI_hammer data writebacks to the directoryBrad Beckmann
2010-01-29ruby: cleaned up ruby profilersBrad Beckmann
2010-01-29ruby: Removed RubySystem::getNumberOfSequencersBrad Beckmann
2010-01-29ruby: added ruby stats printBrad Beckmann
2010-01-29ruby: fixed Set.cc bug to allow zero sized setsBrad Beckmann
2010-01-29ruby: FS support using the new configuration systemBrad Beckmann
2010-01-29ruby: reorganized ruby python configurationBrad Beckmann
2010-01-29ruby: Removed out_link_vec from ConsumerBrad Beckmann
2010-01-29ruby: Convered ruby tracing support usage of sequencerBrad Beckmann
2010-01-29ruby: Memory Controller Profiler with new config systemBrad Beckmann
2010-01-29ruby: Converted MOESI_hammer dma cntrl to new config systemBrad Beckmann
2010-01-29ruby: Added the cache profiler to the new config systemBrad Beckmann
2010-01-29ruby: Converted the sequencer deadlock event to m5 eventqBrad Beckmann
2010-01-29ruby: Wrapped ruby events into m5 eventsBrad Beckmann
2010-01-29ruby: Removed the tech_nm variable from RubySystemBrad Beckmann
2010-01-29ruby: Added clock to ruby systemBrad Beckmann
2010-01-29ruby: Ruby changes required to use the python config systemBrad Beckmann
2010-01-29ruby: connects sm queues to the networkBrad Beckmann
2010-01-29ruby: Calculate system total memory capacity in PythonSteve Reinhardt
2010-01-29ruby: Add support for generating topologies in Python.Steve Reinhardt
2010-01-29scons: ignore blank lines in .slicc filesSteve Reinhardt
2010-01-29ruby: Make SLICC-generated objects SimObjects.Steve Reinhardt
2010-01-29ruby: Convert most Ruby objects to M5 SimObjects.Steve Reinhardt
2010-01-29ruby: get rid of obsolete, unused CustomTopology class.Steve Reinhardt
2010-01-29ruby: fix out_port declarationBrad Beckmann
2010-01-29ruby: Added message type check to OutPortDeclAST.pyBrad Beckmann
2010-01-23build: need to include cstdioNathan Binkert
2009-11-05compile: compile on 32 bit hardwareNathan Binkert
2009-11-05isa_parser: allow negative integer literalsNathan Binkert
2010-01-22Automated merge with ssh://hg@m5sim.org/m5Derek Hower
2010-01-19util: do checkpoint aggregation more cleanly, fix last changeset.Lisa Hsu
2010-01-19ruby: new atomics implementationDerek Hower
2010-01-19mergeDerek Hower
2010-01-18 util: make a generic checkpoint aggregator that can aggregate different cpts...Lisa Hsu
2010-01-12cache: make tags->insertBlock() and tags->accessBlock() context aware so that...Lisa Hsu
2010-01-12since totalInstructions() is impl'ed by all the cpus, make it an abstract bas...Lisa Hsu
2010-01-12faults: i think these fault invocations should be panic and not fatal. it def...Lisa Hsu
2009-12-31MIPS: Beef up process initialization.Matt DeVuyst
2009-12-31MIPS: Implement the SE mode version of rdhwr.Gabe Black
2009-12-31MIPS: Fix decoding of the rdhwr instruction.Gabe Black
2009-12-31MIPS: Implement the set_thread_area system call.Gabe Black
2009-12-31MIPS: Create an artificial control register to hold the thread pointer.Gabe Black
2009-12-31MIPS: Extract CPU pointer from the thread context in scheduleCP0 setMiscReg.Gabe Black
2009-12-21MIPS: Add missing syscall slots.Gabe Black
2009-12-20Alpha: Implement MVI and remaining BWX instructions.Soumyaroop Roy
2009-12-19X86: Add a latency that describes how long an interrupt takes to propagate th...Gabe Black
2009-12-19X86: Add a common named flag for signed media operations.Gabe Black