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2007-07-26Merge python and x86 changes with cache branchNathan Binkert
2007-07-26Merge with head.Gabe Black
2007-07-26X86: Fix argument register indexing.Gabe Black
2007-07-26X86: Hook in shift and rotate by one instructions, and NOT.Gabe Black
2007-07-26X86: Fix pc relative versions of add and subtract.Gabe Black
2007-07-26X86: Implement rotate-by-one instructions, and make register rotates use regi...Gabe Black
2007-07-26X86: Implement shift-by-one instructions, and make register shifts use regist...Gabe Black
2007-07-26X86: Add functions to read and write to an exec context.Gabe Black
2007-07-26X86: Fix carry calculation for subtraction based microops.Gabe Black
2007-07-26Add functions for mmap and brk.Gabe Black
2007-07-26Implement NOTGabe Black
2007-07-26Have owner respond to UpgradeReq to avoid race.Steve Reinhardt
2007-07-26Add downward express snoops for invalidations.Steve Reinhardt
2007-07-26Continue snooping after a writeback is encountered.Steve Reinhardt
2007-07-26bus: Fix default port handling.Steve Reinhardt
2007-07-25Add a new SCons option called EXTRAS that allows you to include stuff inNathan Binkert
2007-07-25Can't block on memInhibit packetsSteve Reinhardt
2007-07-24Integrate snoop loop functions into their respective call sites.Steve Reinhardt
2007-07-24Don't delete request at target... requester still needs it.Steve Reinhardt
2007-07-24Merge with head.Gabe Black
2007-07-24Hook in a bunch of new instructions, fix a few minor bugs, and expand out one...Gabe Black
2007-07-24Add a tgt_iovec structure to support writev, change the name of X86Linux to X...Gabe Black
2007-07-24Add a special case for "test" which needs an immediate even though everything...Gabe Black
2007-07-24The groups of instructions hanging off opcode 71h, 72h, and 73h all need a by...Gabe Black
2007-07-24Make the shift and rotate microops mask the shift/rotate amount correctly.Gabe Black
2007-07-24Fix immediate shifts. Implement register shifts.Gabe Black
2007-07-24Fix immediate rotates and add register ones.Gabe Black
2007-07-24Clean out part of an old comment.Gabe Black
2007-07-24Implement cmov.Gabe Black
2007-07-24Implement cdqe and cqo, which are also called cbw and cwde, and cwd and cdq r...Gabe Black
2007-07-24Implement setcc.Gabe Black
2007-07-24Get rid of an old comment.Gabe Black
2007-07-24Get rid of an old commentGabe Black
2007-07-23A couple more minor bug fixes for multilevel coherence.Steve Reinhardt
2007-07-23Major changes to how SimObjects are created and initialized. Almost allNathan Binkert
2007-07-23Implement pusha, popa, three operand imul, hook them into the decoder, and cl...Gabe Black
2007-07-23Fix WriteReq/StoreCondReq setting in O3.Steve Reinhardt
2007-07-22Replace lowerMSHRPending flag with more robust schemeSteve Reinhardt
2007-07-23Make the operand size reflect the size specifier on the operand tags, and imp...Gabe Black
2007-07-22Merge more changes in from head.Steve Reinhardt
2007-07-22Replace DeferredSnoop flag with LowerMSHRPending flag.Steve Reinhardt
2007-07-22Merge Gabe's changes with mine.Steve Reinhardt
2007-07-22A few minor non-debug compilation issues.Steve Reinhardt
2007-07-22Add the "open" syscall.Gabe Black
2007-07-22Fixed immediate byte accounting bug.Gabe Black
2007-07-22Fixed displacement size bug.Gabe Black
2007-07-21Implemented and hooked in xchg, rotate with carry, and ret instructionsGabe Black
2007-07-21Implement rotate with carry microops.Gabe Black
2007-07-21Deal with invalidations intersecting outstanding upgrades.Steve Reinhardt
2007-07-21Several more fixes for multi-level timing coherence.Steve Reinhardt