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gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
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Age
Commit message (
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Author
2007-01-27
I missed a couple of things
Ali Saidi
2007-01-27
While I'm waiting for legion to run make m5 compile with a few more compilers
Ali Saidi
2007-01-26
Merge zizzer:/bk/newmem
Ali Saidi
2007-01-26
forgot to include this file
Ali Saidi
2007-01-26
Merge zizzer:/bk/newmem
Ali Saidi
2007-01-26
Make Sparc traceflag even more chatty
Ali Saidi
2007-01-26
Merge zizzer:/bk/newmem
Ali Saidi
2007-01-26
Merge zeep.pool:/z/saidi/work/m5.newmem
Ali Saidi
2007-01-26
make our code a little more standards compliant
Ali Saidi
2007-01-26
Merge zizzer:/bk/newmem
Lisa Hsu
2007-01-26
eliminate cpu checkInterrupts bool, it is redundant and unnecessary.
Lisa Hsu
2007-01-25
Move time forward to Jan 1, 2009 and update stats
Nathan Binkert
2007-01-25
Merge zizzer.eecs.umich.edu:/bk/newmem
Nathan Binkert
2007-01-25
Instead of passing an int to represent time between python and C++
Nathan Binkert
2007-01-25
fix smul and sdiv to sign extend, and handle overflow/underflow corretly
Ali Saidi
2007-01-23
use pstate.am to mask off PC/NPC where it needs to +be
Ali Saidi
2007-01-22
fix compiling on x86/Solaris
Ali Saidi
2007-01-22
clean up fault code a little bit
Ali Saidi
2007-01-22
we decided to check for .interp instead of .dynamic
Ali Saidi
2007-01-22
Merge zizzer:/bk/newmem
Ali Saidi
2007-01-22
check if an executable is dynamic and die if it is
Ali Saidi
2007-01-22
use writeTagAccess() function to unify writing of Tag access registers
Ali Saidi
2007-01-21
make sure that page bits of VA on tlb insert are 0
Ali Saidi
2007-01-21
add dumb time of day device
Ali Saidi
2007-01-20
fix InterruptLevel code to return the correct level
Ali Saidi
2007-01-20
atually set all 64 bits of the retun value to 0
Ali Saidi
2007-01-20
fix flushw implementation
Ali Saidi
2007-01-20
Rearange tlb code to remove some duplicate
Ali Saidi
2007-01-20
Spill and Fill handlers are actually n*4 + the start address
Ali Saidi
2007-01-19
Merge zed.eecs.umich.edu:/.automount/zeep/z/saidi/work/m5.newmem
Lisa Hsu
2007-01-19
some hstick and hintp changes.
Lisa Hsu
2007-01-17
Allow ASI_LDTX_REAL
Ali Saidi
2007-01-17
do a linear search for matching tlb entries instead of using map because you ...
Ali Saidi
2007-01-17
Implement reading writing of sync fault status register and address register
Ali Saidi
2007-01-16
In the case that we generate a fault (e.g. a tlb miss) on a microcoded instru...
Ali Saidi
2007-01-16
Don't add symbols for loaded files to symbol table since they are pretty much...
Ali Saidi
2007-01-16
Fix legion lock code a bit so that if we jump out of a micro coded instructio...
Ali Saidi
2007-01-16
In the case of ASI_P or ASI_LDTX_P set primary and skip the other checks
Ali Saidi
2007-01-16
Modify ISA and staticInst to support a IsFirstMicroOp flag
Ali Saidi
2007-01-11
Merge zed.eecs.umich.edu:/z/hsul/work/sparc/ali.m5
Lisa Hsu
2007-01-11
ua2005.cc:
Lisa Hsu
2007-01-11
ua2005.cc:
Lisa Hsu
2007-01-11
Add Trap Level Zero to interrupts, remove some unreachable code that I forgot...
Lisa Hsu
2007-01-10
bug fixes to get us to 145m instructions
Ali Saidi
2007-01-09
quiet/remove some warnings
Ali Saidi
2007-01-09
add memory mapped disk device
Ali Saidi
2007-01-08
pagetable.hh:
Lisa Hsu
2007-01-08
the way i understand it, interrupts in m5 is a little bloated. the usage of ...
Lisa Hsu
2007-01-08
some formatting changes, and update how I do bitfields for HPSTATE and PSTATE...
Lisa Hsu
2007-01-08
change when legion-lock causes the simulation to die. It now happens after tw...
Ali Saidi
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