gem5 - gem5

Age	Commit message (Expand)	Author
2013-10-31	base: Add support for ipv6 into inet.hh/inet.cc	Geoffrey Blake
2013-10-31	cpu: Construct ROB with cpu params struct instead of each variable	Faissal Sleiman
2013-10-31	config: Fix handling of parents for simobject vectors	Geoffrey Blake
2013-10-31	sim: added option to serialize SimLoopExitEvent	Dam Sunwoo
2013-10-31	mem: Add "const" attribute to Packet getters	Stephan Diestelhorst
2013-10-31	mem: Add privilege info to request class	Prakash Ramrakhyani
2013-10-31	cpu: Fix O3 issuse with load+barrier instructions.	Ali Saidi
2013-10-30	ruby: set SenderMachine in messages of MOESI_CMP_directory	Lluc Alvarez
2013-10-30	ruby: Fixed a deadlock when restoring a checkpoint with garnet	Emilio Castillo
2013-10-17	mem: De-virtualise interfaces in the CoherentBus	Stephan Diestelhorst
2013-10-17	cpu: add consistent guarding to *_impl.hh files.	Matt Horsnell
2013-10-17	mem: Add PortID to QueuedMasterPort constructor	Sascha Bischoff
2013-10-17	arm: Add a 'clear PPI' method to gic_pl390	Matt Evans
2013-10-17	config: Fix ommission of number base in ethernet address param	Geoffrey Blake
2013-10-17	config: Fix for port references generated multiple times	Geoffrey Blake
2013-10-17	dev: Add option to disable framebuffer .bmp dump in run folder	Dam Sunwoo
2013-10-17	cpu: Removing an unused variable in rename	Faissal Sleiman
2013-10-17	cpu: Change IEW DPRINTF to use IEW debug flag	Faissal Sleiman
2013-10-17	cpu: Put in assertions to check for maximum supported LQ/SQ size	Faissal Sleiman
2013-10-17	arm: Accomodate function name changes in newer linux kernels	Eric Van Hensbergen
2013-10-17	arm: Fix a GIC mask register bug	Ali Saidi
2013-10-17	cpu: Fix O3 uncacheable load that is replayed but misses the TLB	Ali Saidi
2013-10-17	mem: Make MemoryAccess flag more verbose	Ali Saidi
2013-10-17	build: Place proto output in the same directory, also for EXTRAS	Andreas Hansson
2013-10-17	dev: Allow additional UART interrupts to be set	Ali Saidi
2013-10-16	kvm: Fix latency calculation of IPR accesses	Andreas Sandberg
2013-10-15	ruby: eliminate non-determinism from ruby.stats output	Steve Reinhardt
2013-10-15	arch/x86: add support for explicit CC register file	Yasuko Eckert
2013-10-15	cpu: add a condition-code register class	Yasuko Eckert
2013-10-15	cpu/o3: clean up rename map and free list	Steve Reinhardt
2013-10-15	cpu: rename _DepTag constants to _Reg_Base	Steve Reinhardt
2013-10-15	isa: clean up register constants	Steve Reinhardt
2013-10-15	cpu/o3: clean up scoreboard object	Steve Reinhardt
2013-10-15	cpu/o3: clean up physical register file	Steve Reinhardt
2013-10-15	cpu/inorder: merge register class enums	Steve Reinhardt
2013-10-15	cpu: clean up architectural register classification	Steve Reinhardt
2013-10-15	mem: Rename the ASI_BITS flag field in Request	Andreas Sandberg
2013-10-15	mem: Use a flag instead of address bit 63 for generic IPRs	Andreas Sandberg
2013-10-07	x86: enables lstat and readlink syscalls	Nilay Vaish
2013-10-07	base: Fix a potential race in PollQueue::setupAsyncIO	Andreas Sandberg
2013-10-03	kvm: Service events in the instruction event queues	Andreas Sandberg
2013-09-30	x86: Add support for m5ops through a memory mapped interface	Andreas Sandberg
2013-09-30	arch: Add support for m5ops using mmapped IPRs	Andreas Sandberg
2013-09-30	x86: Add support for FXSAVE, FXSAVE64, FXRSTOR, and FXRSTOR64	Andreas Sandberg
2013-09-30	x86: Add support for FLDENV & FNSTENV	Andreas Sandberg
2013-09-30	x86: Add support for loading 32-bit and 80-bit floats in the x87	Andreas Sandberg
2013-09-30	x86: Fix re-entrancy problems in x87 store instructions	Andreas Sandberg
2013-09-30	kvm: Add support for thread-specific instruction events	Andreas Sandberg
2013-09-30	kvm: FPU synchronization support on x86	Andreas Sandberg
2013-09-30	x86: Add support routines to load and store 80-bit floats	Andreas Sandberg