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gem5
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invisispec-with-dift
is-ift
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is-rebase
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is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
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Age
Commit message (
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Author
2011-06-02
copyright: Add code for finding all copyright blocks and create a COPYING file
Nathan Binkert
2011-06-02
copyright: clean up copyright blocks
Nathan Binkert
2011-06-01
SimObject: allow modules in subclass definitions
Steve Reinhardt
2011-05-31
orion: bug fix in link power, and some reorg
Tushar Krishna
2011-05-31
garnet: added network ptr to links to be used by orion
Tushar Krishna
2011-05-29
Misc: Remove the URL from warnings, fatals, panics, etc.
Gabe Black
2011-05-25
Name: Replace M5 with gem5 in a few places it's printed on startup.
Gabe Black
2011-05-23
sim: style fixes in sim/process.hh
Steve Reinhardt
2011-05-23
syscall emul: fix Power Linux mmap constant, plus other cleanup
Steve Reinhardt
2011-05-23
config: revamp x86 config to avoid appending to SimObjectVectors
Steve Reinhardt
2011-05-23
config: tweak ruby configs to clean up hierarchy
Steve Reinhardt
2011-05-23
config: reinstate implicit parenting on parameter assignment
Steve Reinhardt
2011-05-23
sim: add some DPRINTFs for debugging unserialization
Steve Reinhardt
2011-05-23
O3: Fix offset calculation into storeQueue buffer for store->load forwarding
Geoffrey Blake
2011-05-23
O3: Fix issue w/wbOutstading being decremented multiple times on blocked cache.
Geoffrey Blake
2011-05-23
O3: Fix issue with interrupts/faults occuring in the middle of a macro-op
Geoffrey Blake
2011-05-21
garnet: use vnet_type from protocol to decide buffer depths
Tushar Krishna
2011-05-20
slicc: added vnet_type to MI_example
Tushar Krishna
2011-05-18
gcc: fix an uninitialized variable warning from G++ 4.5
Nathan Binkert
2011-05-18
slicc: added vnet_type field to identify response vnets from others
Tushar Krishna
2011-05-18
garnet: rename and rearrange config parameters.
Tushar Krishna
2011-05-13
ARM: Generate condition code setting code based on which codes are set.
Ali Saidi
2011-05-13
ARM: Construct the predicate test register for more instruction programatically.
Ali Saidi
2011-05-13
ARM: Further break up condition code into NZ, C, V bits.
Ali Saidi
2011-05-13
ARM: Remove the saturating (Q) condition code from the renamed register.
Ali Saidi
2011-05-13
ARM: Break up condition codes into normal flags, saturation, and simd.
Ali Saidi
2011-05-13
Trace: Allow printing ASIDs and selectively tracing based on user/kernel code.
Chander Sudanthi
2011-05-13
ARM: Better RealView/Versatile EB platform support.
Chander Sudanthi
2011-05-13
O3: Fix an issue with a load & branch instruction and mem dep squashing
Geoffrey Blake
2011-05-12
stats: delete mysql support
Nathan Binkert
2011-05-12
stats: move code that loops over all stats into python
Nathan Binkert
2011-05-12
stats: better expose statistics to python.
Nathan Binkert
2011-05-09
work around gcc 4.5 warning
Nathan Binkert
2011-05-07
NetworkTest: added sim_cycles parameter to the network tester.
Tushar Krishna
2011-05-07
network: added Torus and Pt2Pt topologies
Tushar Krishna
2011-05-07
Trace: Remove the options trace-help and trace-flags
Nilay Vaish
2011-05-06
X86: Fix the Lldt instructions so they load the ldtr and not the tr.
Gabe Black
2011-05-05
ruby: use RubyMemory flag & remove setDebug() functionality
Korey Sewell
2011-05-04
ARM: Add support for loading the a bootloader and configuring parameters for it
Ali Saidi
2011-05-04
ARM: Implement WFE/WFI/SEV semantics.
Prakash Ramrakhyani
2011-05-04
ARM: Add support for MP misc regs and broadcast flushes.
Ali Saidi
2011-05-04
ARM: Make GIC handle IPIs and multiple processors.
Prakash Ramrakhyani
2011-05-04
ARM: Add snoop control unit device.
Ali Saidi
2011-05-04
ARM: Add support for some more registers in the real view controller.
Ali Saidi
2011-05-04
Debug: Add a function to cause the simulator to create a checkpoint from GDB.
Ali Saidi
2011-05-04
CPU: Add some useful debug message to the timing simple cpu.
Ali Saidi
2011-05-04
CPU: Fix a case where timing simple cpu faults can nest.
Ali Saidi
2011-05-04
O3: Remove assertion for case that is actually handled in code.
Ali Saidi
2011-05-04
Core: Add some documentation about the sim clocks.
Ali Saidi
2011-05-04
RealView: Fix the 24 and 100MHz clocks which were providing incorrect values.
Chris Emmons
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