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AgeCommit message (Expand)Author
2017-12-05mem: Add the notion of point of unification in the coherent xbarNikos Nikoleris
2017-12-05learning_gem5: Adding code for SimpleCacheJason Lowe-Power
2017-12-05learning_gem5: Adds the simple MemObject codeJason Lowe-Power
2017-12-05learning_gem5: Add code for hello-goodbye exampleJason Lowe-Power
2017-12-05learning_gem5: Add code for simple SimObjectJason Lowe-Power
2017-12-04base: Rework the trie dump function to accept a different ostream.Gabe Black
2017-12-04misc: Rename misc.(hh|cc) to logging.(hh|cc)Gabe Black
2017-12-04misc: Move the ExitLogger class definition into misc.ccGabe Black
2017-12-04tests: Remove trietest's dependence on cprintf.Gabe Black
2017-12-04tests: Add a ptr helper function trietest.Gabe Black
2017-12-04tests: Get rid of the bitvectest unit test.Gabe Black
2017-12-01arm: Enable ns registers access in secure modeGiacomo Travaglini
2017-11-30arch-riscv: use sext rather than manual masksAlec Roelke
2017-11-30arch-riscv: Remove spaces around ea_codeAlec Roelke
2017-11-29arch-riscv: Add missing license paragraphsAlec Roelke
2017-11-29cpu: Don't override ISA if provided by userAndreas Sandberg
2017-11-29cpu-minor: Add missing instruction statsDavid Guillen Fandos
2017-11-29arch-riscv: Remove static parts of AMOs out of ISAAlec Roelke
2017-11-29arch-riscv: Move parts of mem insts out of ISAAlec Roelke
2017-11-29arch-riscv: Move unknown out of ISA descriptionAlec Roelke
2017-11-29arch-riscv: Move standard ops out of ISAAlec Roelke
2017-11-28cpu-o3: Add missing vector stat initializersAndreas Sandberg
2017-11-28arch-arm: Add haveEL pseudocode functionGiacomo Travaglini
2017-11-28arch-arm: Add assertions when extracting an ArmSystem from a TCGiacomo Travaglini
2017-11-28tests: Move the bituniontest to be alongside the bitunion header.Gabe Black
2017-11-28scons: Build GTests in the directory they're declared.Gabe Black
2017-11-28tests: Reimplement the bituniontest as a googletest.Gabe Black
2017-11-28scons: Add in a new type of unit test called GTest.Gabe Black
2017-11-28scons: Minor cleanup of how partial linking is handled in makeEnv.Gabe Black
2017-11-28arch-riscv: Move static_inst into a directoryAlec Roelke
2017-11-27tests: Build the input file into the initest unit test.Gabe Black
2017-11-27scons: Break make_obj into make_static and make_shared functions.Gabe Black
2017-11-27scons: Remove the extra_deps option from the helper function make_obj.Gabe Black
2017-11-27scons: Get rid of a flag which makes Werror optional.Gabe Black
2017-11-27scons: Move some compiler flag setting code to the SConstruct.Gabe Black
2017-11-27scons: Get rid of SourceFile's done function.Gabe Black
2017-11-27scons: Switch from "guards" to "tags" on source files.Gabe Black
2017-11-22tests: Resurrect initest input file(s).Gabe Black
2017-11-22tests: Fix the stats unit test.Gabe Black
2017-11-22arch-arm: Add support for the brk instructionAndreas Sandberg
2017-11-22arch-arm: HVC instruction undefined in secure EL1Giacomo Travaglini
2017-11-22arch-riscv: Add missing system callsAlec Roelke
2017-11-22sim-se: Add default to SyscallDesc constructorAlec Roelke
2017-11-22sparc: Move integer StaticInst base classes out of the ISA desc.Gabe Black
2017-11-22sparc: Move the mem base classes out of the ISA description.Gabe Black
2017-11-22sparc: Move the microop/macroop base classes out of the ISA desc.Gabe Black
2017-11-22sparc: Return debug faults from unimplemented instructions.Gabe Black
2017-11-22sparc: Pull the unimplemented formats out of the ISA description.Gabe Black
2017-11-22sparc: Pull the "Uknown" StaticInst class out of the ISA description.Gabe Black
2017-11-22sparc: Pull most of the Nop format out of the ISA description.Gabe Black