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AgeCommit message (Expand)Author
2017-11-22sparc: Pull more StaticInst base classes out of the ISA desc.Gabe Black
2017-11-22sparc: Pull flat static instruction classes out of the ISA.Gabe Black
2017-11-21arch-arm: ArmPMU refactorJose Marinho
2017-11-21arch-arm: Do not increment PMU cycle event in WFI/WFEJose Marinho
2017-11-21cpu, cpu, sim: move Cycle probe updateJose Marinho
2017-11-21sim: Fix need to save address space info during serialization.Austin Harris
2017-11-21arch-arm: Fix MCR/MRC disassembleGiacomo Travaglini
2017-11-21arch-arm: Fix MSR/MRS disassembleGiacomo Travaglini
2017-11-21cpu-o3: Prevent cpu from suspending if it is already drainingNikos Nikoleris
2017-11-20arch-arm: Ensure counters keep events on checkpoint resumeJose Marinho
2017-11-20cpu: Make automatic transition to OFF optionalJose Marinho
2017-11-20pwr: Adds logic to enter power gating for the cpu modelAnouk Van Laer
2017-11-20sparc: Pull StaticInst base classes out of the ISA description.Gabe Black
2017-11-20dev: Fix the SPARC and X86 platform devices.Gabe Black
2017-11-19tests: Fix compilation of cprinftest.Gabe Black
2017-11-17sim: Implement load_addr_mask auto-calculationGeoffrey Blake
2017-11-16sim: ScopedMigration does nothing if both eqs are the sameTiago Muck
2017-11-16ext, mem: Pull DRAMPower SHA 90d6290 and rebaseRadhika Jagtap
2017-11-16pwr: Enable multiple power models per componentDavid Guillen Fandos
2017-11-16arch, arm: Print value being ignored on DummyISA writeSean McGoogan
2017-11-16sim: Clocked object debug message updated for clarityTiago Muck
2017-11-16sim: Add an option to load additional kernel objectsAndreas Sandberg
2017-11-15arch-arm: Dsb instruction shouldn't flush the pipelineGiacomo Travaglini
2017-11-15arch-arm: Writes to DCCMVAC shouldn't flush pipelineGiacomo Travaglini
2017-11-15arch-arm: Removing FlushPipe fault, using SquashAfterGiacomo Travaglini
2017-11-15arm: Add support for armv8 CRC32 instructionsGiacomo Travaglini
2017-11-14cpu, probe: Fix elastic trace register dependencyRadhika Jagtap
2017-11-13config: Add an Energy param type.Gabe Black
2017-11-13config: Export the "Current" param type from m5.params.Gabe Black
2017-11-13util: Add a "toEnergy" function to the convert module.Gabe Black
2017-11-13config: Simplify the definitions of the Voltage and Current params.Gabe Black
2017-11-13arch-arm: Interface for the ArmStaticInst intWidth fieldGiacomo Travaglini
2017-11-13arch-arm: Corrected encoding for T32 HVC instructionGiacomo Travaglini
2017-11-13util: Simplify/consolidate the python conversion module.Gabe Black
2017-11-10scons: Move Transform and termcap functionality into their own files.Gabe Black
2017-11-09mem: Align the snoop behavior in the XBar for atomic and timingNikos Nikoleris
2017-11-09arch-arm: Allow dc ivac from EL0 when SCTLR_EL1.UCI=1Nikos Nikoleris
2017-11-08dev: Move generic serial devices to src/dev/serialAndreas Sandberg
2017-11-08dev: Add a dummy serial deviceAndreas Sandberg
2017-11-08dev: Refactor UART->Terminal interfaceAndreas Sandberg
2017-11-07alpha,arm,mips,power,riscv,sparc,x86: Merge exec decl templates.Gabe Black
2017-11-06sim-se: Add prlimit system callAlec Roelke
2017-11-02alpha,arm,mips,power,riscv,sparc,x86,isa: De-specialize ExecContexts.Gabe Black
2017-10-31dev: Using Configurable image writer in HDLcdGiacomo Travaglini
2017-10-31vnc: Default image writer type set to AutoGiacomo Travaglini
2017-10-31base: Introducing utility for writing raw data in png formatGiacomo Travaglini
2017-10-31x86: Fix VEX instruction decoding.Gabe Black
2017-10-30base: Fix forcing loopback only binding for listeners.Gabe Black
2017-10-20arch-arm: RBIT instruction using mirroring funcGiacomo Travaglini
2017-10-20base: Function for mirroring bits in variable length wordGiacomo Travaglini