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AgeCommit message (Expand)Author
2014-09-03arch, cpu: Factor out the ExecContext into a proper base classAndreas Sandberg
2014-09-03arch: Cleanup unused ISA traits constantsAndreas Hansson
2014-09-03config: Change parsing of Addr so hex values work from scriptsMitch Hayenga
2014-09-03arm: Fix ExtMachInst hash operator underlying typeAndreas Hansson
2014-09-01ruby: remove typedef of Index as int64Nilay Vaish
2014-09-01x86: set op class of two fp instructionsNilay Vaish
2014-09-01ruby: PerfectSwitch: moves code to a per vnet helper functionNilay Vaish
2014-09-01ruby: message buffers: significant changesNilay Vaish
2014-09-01build opts: add MI_example to NULL ISANilay Vaish
2014-09-01mem: change the namespace Message to ProtoMessageNilay Vaish
2014-09-01ruby: slicc: change the way configurable members are specifiedNilay Vaish
2014-09-01ruby: slicc: improve the grammarNilay Vaish
2014-09-01ruby: mesi three level: slight naming changes.Nilay Vaish
2014-09-01ruby: slicc: donot prefix machine name to variablesNilay Vaish
2014-09-01ruby: remove unused toString() from AbstractControllerNilay Vaish
2014-09-01ruby: network: move getNumNodes() to base classNilay Vaish
2014-09-01ruby: eliminate type TimeNilay Vaish
2014-09-01ruby: move files from ruby/system to ruby/structuresNilay Vaish
2014-08-28mem: adding architectural page table support for SE modeAlexandru
2014-04-01mem: adding a multi-level page table classAlexandru
2014-08-26mem: Fix DRAMSim2 cycle check when restoring from checkpointAndreas Hansson
2014-08-26base: Add const to intmath and be more flexible with typingAndreas Hansson
2014-08-26base: Replace the internal varargs stuff with C++11 constructsAndreas Sandberg
2014-08-26base: Add compiler macros for C++11 final/overrideAndreas Sandberg
2014-08-26mips: Fix RLIMIT_RSS namingMitch Hayenga
2014-08-26base: Add a static assert to check bit union rangesAndreas Sandberg
2014-08-26sparc: Fixup bit ordering in the PSTATE bit unionAndreas Sandberg
2014-08-26mem: Update DRAM controller commentsAndreas Hansson
2014-08-26mem: Fix address interleaving bug in DRAM controllerAndreas Hansson
2014-02-05sim: bump checkpoint version for multiple event queuesCurtis Dunham
2014-08-13arm: change MISCREG_L2ERRSR to warn not failDam Sunwoo
2014-08-13sim: remove kernel mapping check for baremetal workloadsDam Sunwoo
2014-08-13scons: Build the branch predictor for all CPUsAndreas Sandberg
2014-08-13mips: Remove unused private members to fix compile-time warningAndreas Sandberg
2014-08-13power: Remove unused private members to fix compile-time warningAndreas Sandberg
2014-08-13scons: Silence clang 3.4 warnings on Ubuntu 12.04Andreas Sandberg
2014-08-13base: Remove unused M5_PRAGMA_NORETURNAndreas Sandberg
2014-08-13cpu: Don't forward declare RefCountingPtrAndreas Sandberg
2014-08-13mem: Properly set cache block status fields on writebacksMitch Hayenga
2014-08-13cpu: Modernise the branch predictor (STL and C++11)Andreas Hansson
2014-03-11arm: remove dead code fplib mul64x64Curtis Dunham
2014-08-10config: Add SubSystem container for simobjectsGeoffrey Blake
2014-08-10config: Add hooks to enable new config sysGeoffrey Blake
2014-08-10cpu: Ensure the traffic generator suppresses non-memory packetsAndreas Hansson
2014-08-10base: Remove unused filesAndreas Hansson
2014-07-28mem: refactor LRU cache tags and add random replacement tagsAnthony Gutierrez
2014-07-23cpu: `Minor' in-order CPU modelAndrew Bardsley
2014-07-19syscall emulation: fix fast build issueSteve Reinhardt
2014-07-18x86: make PioBus return BadAddress errorsBinh Pham
2014-07-18sim: remove unused MemoryModeStrings arraySteve Reinhardt
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