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AgeCommit message (Expand)Author
2011-09-22params.py: enhance IpAddress param handlingSteve Reinhardt
2011-09-19MIPS: Final overhaul of MIPS faults to kill #if FULL_SYSTEMGabe Black
2011-09-19MIPS, faults: Update how the PC is set.Gabe Black
2011-09-19MIPS: Get rid of skipFaultInstruction and setRestartAddress.Gabe Black
2011-09-19MIPS: Use inheritance to consolidate class definitions.Gabe Black
2011-09-19MIPS: Always compile in setExceptionState, including in SE mode.Gabe Black
2011-09-19MIPS: Consolidate TLB related faults.Gabe Black
2011-09-19MIPS: Get rid of the unused "count" field in FaultVals.Gabe Black
2011-09-19MIPS: Move the genMachineCheckFault function near MachineCheckFault.Gabe Black
2011-09-19MIPS: Consolidate the two AddressErrorFault variants.Gabe Black
2011-09-19Faults: Get rid of the unused isAlignmentFault and isMachineCheckFault.Gabe Black
2011-09-19MIPS: Get rid of cruft in the fault classes.Gabe Black
2011-09-19MIPS: Add constructors to the fault classes.Gabe Black
2011-09-19MIPS: Use the CRTP to streamline the Fault class definitions.Gabe Black
2011-09-19SPARC: Remove #if FULL_SYSTEMs from the ISA description.Gabe Black
2011-09-19MIPS: Get rid of #if style config checks in the ISA description.Gabe Black
2011-09-19MIPS: Guard SystemCallFault::invoke consistently.Gabe Black
2011-09-19MIPS: Get rid of the unused (and partially defined) CacheError fault.Gabe Black
2011-09-19Endianness: Make it easier to check the compiled in guest endianness.Gabe Black
2011-09-19Alpha: Get rid of some #if FULL_SYSTEMs in the Alpha ISA description.Gabe Black
2011-09-19PseudoInst: Make all the pseudo insts available in SE and FS.Gabe Black
2011-09-19X86: Don't use "#if FULL_SYSTEM" in the X86 ISA description.Gabe Black
2011-09-19Syscall: Make the syscall function available in both SE and FS modes.Gabe Black
2011-09-19PseudoInst: Remove the now unnecessary #if FULL_SYSTEMs around pseudoinsts.Gabe Black
2011-09-18Pseudoinst: Add an initParam pseudo inst function.Gabe Black
2011-09-13IGbE: Clean up debug printing and proprly account for copied bytes.Ali Saidi
2011-09-13ARM: update TLB to set request packet ASID fieldDaniel Johnson
2011-09-13Mem: Allow ASID to be set after request is created.Daniel Johnson
2011-09-13CP15 c15: enable execution with accesses to c15 registersChander Sudanthi
2011-09-13ARM: Implement numcpus bits in L2CTLR register.Daniel Johnson
2011-09-13Prefetch: Don't prefetch if address is in the write queue.Ali Saidi
2011-09-13LSQ: Only trigger a memory violation with a load/load if the value changes.Ali Saidi
2011-09-10MIPS: Implement gem5/src/arch/mips/remote_gdb.cc.Deyuan Guo
2011-09-10PseudoInst: Add compiler guards to pseudo_inst.hh.Gabe Black
2011-09-09StaticInst: Merge StaticInst and StaticInstBase.Gabe Black
2011-09-09Decode: Pull instruction decoding out of the StaticInst class into its own.Gabe Black
2011-09-09Stack: Tidy up some comments, a warning, and make stack extension consistent.Gabe Black
2011-09-08ISA parser: Don't look for operands in strings.Gabe Black
2011-09-08ISA parser: Match /* */ and // style comments.Gabe Black
2011-09-05X86: Make sure instruction flags are set properly even on 32 bit machines.Gabe Black
2011-09-05X86,TLB: Make sure the "delayedResponse" variable is always set.Gabe Black
2011-09-02TLB: comments and a helpful warning.Lisa Hsu
2011-09-01Fix build for gcc-4.2 opt/fastLisa Hsu
2011-09-01Functional Accesses: Update states to support Broadcast/Snooping protocols.Lisa Hsu
2011-08-29SLICC: Pass arguments by referenceNilay Vaish
2011-08-29Ruby: Remove some unused codeNilay Vaish
2011-08-26Ruby: Eliminate modulo op for computing set size.Nilay Vaish
2011-08-19ARM: Mark some variables uncacheable until boot all CPUs are enabled.Ali Saidi
2011-08-19Mem: Put prefetcher notify call before packet is deleted.Ali Saidi
2011-08-19ARM: Add VExpress_E support with PCIe to gem5Ali Saidi