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2007-07-14Add CacheRepl trace flag and move a couple DPRINTFs to it.Steve Reinhardt
--HG-- extra : convert_revision : 31724d19ebdf2cdc2a2bafff83d17845b3a0b183
2007-07-14Move a couple of DPRINTFs from Cache to CachePort.Steve Reinhardt
--HG-- extra : convert_revision : 55a0d26660aeb8f63b41897d53e6b2d1f0a163be
2007-07-14Fix bug in copying packet with static data pointer.Steve Reinhardt
--HG-- extra : convert_revision : 2fcf99f050d73e007433c1db2475f2893c5961a0
2007-07-14Merge from head.Steve Reinhardt
--HG-- extra : convert_revision : f7b3700762b796d44f99aef05783db1ee9c7412e
2007-07-14Disable PrintThreadInfo since it causes a panic when using VPtr.Steve Reinhardt
See Flyspray #281. --HG-- extra : convert_revision : 199ef802bcabed09f6ea6922c3a3954fea161190
2007-07-14Make NO_FAST_ALLOC compile.Steve Reinhardt
--HG-- extra : convert_revision : 80579a61eb8d220e75cdee11bc09ca985c8fd85c
2007-07-14Merge of DPRINTF fixes from head.Steve Reinhardt
--HG-- extra : convert_revision : f99a33b2df6a6c5592856d17d00e73ee83267442
2007-07-14Fix & tweak DPRINTFs for tracediff w/new cache code.Steve Reinhardt
Note that we should *not* print pointer values in DPRINTFs as these needlessly clutter tracediff output. --HG-- extra : convert_revision : 25a448f1b3ac8d453a717a104ad6dc0112fb30bb
2007-07-03Delete packets when we're done with them.Steve Reinhardt
--HG-- extra : convert_revision : b8894d26e1ca7a6c9b736500accdaa53bfb09558
2007-07-02Couple more minor bug fixes for FS timing mode.Steve Reinhardt
src/cpu/simple/timing.cc: Fix another SC problem. src/mem/cache/cache_impl.hh: Forgot to call makeTimingResponse() on uncached timing responses. --HG-- extra : convert_revision : 5a5a58ca2053e4e8de2133205bfd37de15eb4209
2007-07-02Fix a couple LL/SC bugs that only affected timing mode.Steve Reinhardt
src/cpu/simple/timing.cc: Fix swap/stq_c command bug. src/mem/packet.cc: Fix incorrect LoadLockedReq command response field. --HG-- extra : convert_revision : 7a4523be900bc2c9b1bdf2d372ce55f89ae58ae5
2007-07-02bus.cc:Steve Reinhardt
Fix atomic timing issue. src/mem/bus.cc: Fix atomic timing issue. --HG-- extra : convert_revision : a22ff80cd75f83c785b0604c2a4fde2e2e9f71ef
2007-06-30Make CPU models use new LoadLockedReq/StoreCondReq commands.Steve Reinhardt
--HG-- extra : convert_revision : ab78d9d1d88c3698edfd653d71c8882e1272b781
2007-06-30Don't propagate snoops across bridges. Wouldn't work anyway.Steve Reinhardt
--HG-- extra : convert_revision : af29fc7d0c134f5e89dd2e814c819151350fcb38
2007-06-30Get rid of remaining traces of obsolete CoherenceProtocol object.Steve Reinhardt
--HG-- extra : convert_revision : c5555b00bef1b304a84886188ad2c0dcb4d7c5b9
2007-06-30Can only call makeAtomicResponse() once...Steve Reinhardt
--HG-- extra : convert_revision : c49aade46aa64f979da35eb653b544ee5bd82f01
2007-06-30Get rid of obsolete fixPacket() functions.Steve Reinhardt
Handled by Packet::checkFunctional() now. --HG-- extra : convert_revision : 63642254e2789c80a369ac269f317ec054ffe3c0
2007-06-30Event descriptions should not end in "event"Steve Reinhardt
(they function as adjectives not nouns) --HG-- extra : convert_revision : 6506474ff3356ae8c80ed276c3608d8a4680bfdb
2007-06-30Factor out a little more common code.Steve Reinhardt
--HG-- extra : convert_revision : 626255a91679d534030c91bcdb4fc1bed36ceb9b
2007-06-30Fix up a few statistics problems.Steve Reinhardt
Stats pretty much line up with old code, except: - bug in old code included L1 latency in L2 miss time, making it too high - UniCoherence did cache-to-cache transfers even from non-owner caches, so occasionally the icache would get a block from the dcache not the L2 - L2 can now receive ReadExReq from L1 since L1s have coherence --HG-- extra : convert_revision : 5052c1a1767b5a662f30a88f16012165a73b791c
2007-06-30Get rid of Packet result field. Error responses areSteve Reinhardt
now encoded in cmd field. --HG-- extra : convert_revision : d67819b7e3ee4b9a5bf08541104de0a89485e90b
2007-06-29Merge vm1.(none):/home/stever/bk/newmem-headSteve Reinhardt
into vm1.(none):/home/stever/bk/newmem-cache2 --HG-- extra : convert_revision : 1e94283da8007fce8e1a0f2849ce5d5a8dbbaffd
2007-06-29fix store instructions, pass fast/quick Atomic/TimingSimpleCPU regressions...Korey Sewell
src/arch/mips/isa/decoder.isa: commment out deret instruction for now... src/arch/mips/isa/formats/fp.isa: edit fp format src/arch/mips/isa/formats/mem.isa: fix for basic store instructions --HG-- extra : convert_revision : 30cb5a474e78ac9292b6ab37d433db947a177731
2007-06-28Merge vm1.(none):/home/stever/bk/newmem-headSteve Reinhardt
into vm1.(none):/home/stever/bk/newmem-cache2 --HG-- extra : convert_revision : b1c954c187e3b3172a194396ba63808253121195
2007-06-28o3cpu build for mipsKorey Sewell
--HG-- extra : convert_revision : 2c0be7a8c0a54ba5b1b2b69468f788d20abc8452
2007-06-27Get rid of coherence protocol object.Steve Reinhardt
--HG-- extra : convert_revision : 4ff144342dca23af9a12a2169ca318a002654b42
2007-06-26Revamp replacement-of-upgrade handling.Steve Reinhardt
--HG-- extra : convert_revision : 9bc09d8ae6d50e6dfbb4ab21514612f9aa102a2e
2007-06-26Handle deferred snoops better.Steve Reinhardt
--HG-- extra : convert_revision : 703da6128832eb0d5cfed7724e5105f4b3fe4f90
2007-06-26cache_impl.hh:Steve Reinhardt
Change target overflow from assertion to warning. src/mem/cache/cache_impl.hh: Change target overflow from assertion to warning. --HG-- extra : convert_revision : ceca990ed916bbf96dedd4836c40df522803f173
2007-06-26Handle replacement of block with pending upgrade.Steve Reinhardt
src/mem/cache/tags/lru.cc: Add some replacement DPRINTFs --HG-- extra : convert_revision : 7993ec24d6af7e7774d04ce36f20e3f43f887fd9
2007-06-25Couple minor bug fixes...Steve Reinhardt
src/mem/cache/cache_impl.hh: Handle grants with no packet. src/mem/cache/miss/mshr.cc: Fix MSHR snoop hit handling. --HG-- extra : convert_revision : f365283afddaa07cb9e050b2981ad6a898c14451
2007-06-25Get rid of requestCauses. Use timestamped queue to makeSteve Reinhardt
sure we don't re-request bus prematurely. Use callback to avoid calling sendRetry() recursively within recvTiming. --HG-- extra : convert_revision : a907a2781b4b00aa8eb1ea7147afc81d6b424140
2007-06-24Better handling of deferred targets.Steve Reinhardt
--HG-- extra : convert_revision : 0fbc28c32c1eeb3dd672df14c1d53bd516f81d0f
2007-06-23Merge vm1.(none):/home/stever/bk/newmem-headSteve Reinhardt
into vm1.(none):/home/stever/bk/newmem-cache2 src/base/traceflags.py: Hand merge. --HG-- extra : convert_revision : 9e7539eeab4220ed7a7237457a8f336f79216924
2007-06-23Minor fix plus new assertion to catch similar bugs.Steve Reinhardt
src/cpu/memtest/memtest.cc: Need to set packet source field so that response from cache doesn't run into assertion failure when copying source to dest. src/mem/packet.hh: Copy source field when copying packets. Assert that source is valid before copying it to dest when turning packets around. --HG-- extra : convert_revision : 09e3cfda424aa89fe170e21e955b295746832bf8
2007-06-22FINISH off merge of mips mt/dsp isa extensions by adding the ↵Korey Sewell
ControlBitfieldOPerand to ISA Parser. Now, while things do build, we have to fix broken functionality... src/arch/isa_parser.py: add back deleted writeback in Control Operand --HG-- extra : convert_revision : dba11af220a1281fa53f79d87e4f8752bdfc56db
2007-06-22add Control Bitfield classKorey Sewell
--HG-- extra : convert_revision : 31e7243c8820cb9f6744c53c417460dee9adaf44
2007-06-22Merge vm1.(none):/home/stever/bk/newmem-headSteve Reinhardt
into vm1.(none):/home/stever/bk/newmem-cache2 --HG-- extra : convert_revision : aa50af3094f5d459f75b514179b6e3ec5e0bf1df
2007-06-22mips import pt. 1Korey Sewell
src/arch/mips/SConscript: "mips import pt.1". --HG-- extra : convert_revision : 2e393341938bebf32fb638a209262d074fad4cc1
2007-06-22Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/newmem-o3-micro --HG-- extra : convert_revision : 3fa3fa4544ff8c9d2135e1befe6c8f4757006a2a
2007-06-22Merge vm1.(none):/home/stever/bk/newmem-headSteve Reinhardt
into vm1.(none):/home/stever/bk/newmem-cache2 --HG-- extra : convert_revision : 1da75335907fee2d1745ec13e515819dfe2aad89
2007-06-22Fixes to hitLatency, blocking, buffer allocation.Steve Reinhardt
Single-cpu timing mode seems to work now. --HG-- extra : convert_revision : 720f6172df18a1c941e5bd0e8fdfbd686c13c7ad
2007-06-21Make symbols for regular registers.Gabe Black
--HG-- extra : convert_revision : 28a6df1efe4298877dc2b20179caeb25dfdc4622
2007-06-21Get rid of an unnecessary include file.Gabe Black
--HG-- extra : convert_revision : d8d139180917f54006a5a79df4a0f206ddd39fed
2007-06-21Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-micro src/cpu/o3/fetch_impl.hh: hand merge --HG-- extra : convert_revision : 3f71f3ac2035eec8b6f7bceb6906edb4dd09c045
2007-06-21Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86 --HG-- extra : convert_revision : ba4d93f354749d02278b16e78b4ecd4b2311416b
2007-06-21Merge vm1.(none):/home/stever/bk/newmem-headSteve Reinhardt
into vm1.(none):/home/stever/bk/newmem-cache2 --HG-- extra : convert_revision : 9002940097a166c8442ae1adf41b974227968920
2007-06-21Getting closer...Steve Reinhardt
configs/example/memtest.py: Add progress interval option. src/base/traceflags.py: Add MemTest flag. src/cpu/memtest/memtest.cc: Clean up tracing. src/cpu/memtest/memtest.hh: Get rid of unused code. --HG-- extra : convert_revision : 92bd8241a6c90bfb6d908e5a5132cbdb500cbb87
2007-06-21Use FastAlloc for Packet, Request, CoherenceState, and SenderState so we ↵Ali Saidi
don't spend so much time calling malloc() --HG-- extra : convert_revision : a946564eee46ed7d2aed41c32d488ca7f036c32f
2007-06-21Use the new symbols to clean up the assembler.Gabe Black
--HG-- extra : convert_revision : 005464e875ede1e37dfe0e0482c29fd793ca52be
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