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AgeCommit message (Expand)Author
2011-07-27SLICC: Put functions of a controller in its .cc fileNilay Vaish
2011-07-15Mem: Fix issue with prefetches originating at non-L1 caches getting stale dataAli Saidi
2011-07-15O3: Create a pipeline activity viewer for the O3 CPU model.Giacomo Gabrielli
2011-07-15ARM: Fix SWP/SWPB undefined instruction behaviorWade Walker
2011-07-15ARM: Add two unimplemented miscellaneous registers.Wade Walker
2011-07-11X86: implements copyRegs() functionNilay Vaish
2011-07-11ISA: Get rid of the unused mem_acc_type template parameter.Gabe Black
2011-07-10Branch predictor: Fixes the tournament branch predictor.Mrinmoy Ghosh
2011-07-10O3: Fix up pipelining icache accesses in fetch stage to function properlyGeoffrey Blake
2011-07-10IO: Handle case where ISA Fake device is being used as a fake memory.Ali Saidi
2011-07-10O3: Make sure fetch doesn't go off into the weeds during speculation.Ali Saidi
2011-07-10Config: Add support for a Self.all proxy objectAli Saidi
2011-07-10ARM: Fix mp interrupt bug in GIC.Daniel Johnson
2011-07-07alpha:hwrei:rollback for o3Korey Sewell
2011-07-06ruby: added generic dma machineBrad Beckmann
2011-07-06MOESI_hammer: Fixed uniprocessor DMA bugBrad Beckmann
2011-07-05slicc: add a protocol statement and an include statementNathan Binkert
2011-07-05slicc: cleanup slicc code and make it less verboseNathan Binkert
2011-07-05grammar: better encapsulation of a grammar and parsingNathan Binkert
2011-07-05ISAs: Streamline some spots where Mem is used in the ISA descriptions.Gabe Black
2011-07-05ISA parser: Define operand types with a ctype directly.Gabe Black
2011-07-05ISA parser: Simplify operand type handling.Gabe Black
2011-07-03Merged with Gabe's recent changes.Nilay Vaish
2011-07-03Network_test: Conform it with functional access changes in RubyNilay Vaish
2011-07-02ExecContext: Rename the readBytes/writeBytes functions to readMem and writeMem.Gabe Black
2011-07-02ExecContext: Get rid of the now unused read/write templated functions.Gabe Black
2011-07-02ISA: Use readBytes/writeBytes for all instruction level memory operations.Gabe Black
2011-07-02X86: Fix store microops so they don't drop faults in timing mode.Gabe Black
2011-07-01Ruby: Commit files missing from previous commitNilay Vaish
2011-06-30Ruby: Add support for functional accessesBrad Beckmann ext:(%2C%20Nilay%20Vaish%20%3Cnilay%40cs.wisc.edu%3E)
2011-06-28arch: print next upc correctlyNilay Vaish
2011-06-24Ruby: remove unused functions in CacheMemory: get/setMemoryValueJoel Hestness
2011-06-22mips: fix nmsub and nmadd definitionsDeyaun Guo
2011-06-21X86: Eliminate an unused argument for building store microops.Gabe Black
2011-06-20InOder: Fix a compile error.Gabe Black
2011-06-19inorder: clear reg. dep entry after removing from listKorey Sewell
2011-06-19inorder: se: squash after syscallsKorey Sewell
2011-06-19inorder: cleanup dprintfs in cache unitKorey Sewell
2011-06-19inorder: SE mode TLB faultsKorey Sewell
2011-06-19inorder:tracing: fix fault tracing bugKorey Sewell
2011-06-19inorder: se compile fixesKorey Sewell
2011-06-19inorder: add necessary debug flag header filesKorey Sewell
2011-06-19mips: mark unaligned access flag as trueKorey Sewell
2011-06-19inorder: clear fetchbuffer on trapsKorey Sewell
2011-06-19inorder: use separate float-reg bits function in dyninstKorey Sewell
2011-06-19inorder: use trapPending flag to manage trapsKorey Sewell
2011-06-19inorder/dtb: make sure DTB translate correct addressKorey Sewell
2011-06-19inorder: handle serializing instructionsKorey Sewell
2011-06-19alpha: fix warn_once for prefetchesKorey Sewell
2011-06-19alpha: naming for dtb faultsKorey Sewell
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