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Age
Commit message (
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Author
2013-08-07
ruby: slicc: remove double trigger, continueProcessing
Nilay Vaish
2013-08-07
ruby: slicc: move some code to AbstractController
Nilay Vaish
2013-08-07
x86: add tlb checkpointing
Nilay Vaish
2013-07-19
cpu: Remove unused getBranchPred() method from BaseCPU
Andreas Sandberg
2013-07-18
mem: Set the cache line size on a system level
Andreas Hansson
2013-07-18
mem: Add cache class destructor to avoid memory leaks
Xiangyu Dong
2013-07-18
sim: Make MaxTick in Python match the one in C++
Andreas Hansson
2013-07-15
loader: Load weak symbols for function tracing
Deyuan Guo
2013-07-15
debug : Fixes the issue wherein Debug symbols were not getting dumped into tr...
Umesh Bhaskar
2013-07-11
dev: make BasicPioDevice take size in constructor
Steve Reinhardt
2013-07-11
dev: consistently end device classes in 'Device'
Steve Reinhardt
2013-07-11
dev/arm: get rid of AmbaDev namespace
Steve Reinhardt
2013-07-11
devices: make more classes derive from BasicPioDevice
Steve Reinhardt
2013-07-11
ruby: removed the very old double trigger hack
Brad Beckmann
2013-06-28
ruby: append transition comment only when in opt/debug
Nilay Vaish
2013-06-28
ruby: network: remove reconfiguration code
Nilay Vaish
2013-06-27
mem: Reorganize cache tags and make them a SimObject
Prakash Ramrakhyani
2013-06-27
mem: Remove the cache builder
Andreas Hansson
2013-06-27
config: Remove Clock parameter multiplication
Andreas Hansson
2013-06-27
sim: Add the notion of clock domains to all ClockedObjects
Akash Bagdia
2013-06-27
config: Add a system clock command-line option
Akash Bagdia
2013-06-27
config: Remove redundant explicit setting of default clocks
Akash Bagdia
2013-06-27
mem: Tidy up the bridge with const and additional checks
Andreas Hansson
2013-06-27
mem: Fix CommMonitor style and response check
Andreas Hansson
2013-06-27
mem: Align cache timing to clock edges
Andreas Hansson
2013-06-27
cpu: Consider instructions waiting for FU completion in draining
Andreas Hansson
2013-06-27
mem: Cycles converted to Ticks in atomic cache accesses
Andreas Hansson
2013-06-27
base: Fix address range granularity calculation
Andreas Hansson
2013-06-27
mem: Remove a redundant heap allocation for a snoop packet
Andreas Hansson
2013-06-27
mem: Remove CoherentBus snoop port unused private member
Andreas Hansson
2013-06-27
stats: Remove printing of SparseHist total
Sascha Bischoff
2013-06-25
ruby: moesi cmp directory: separate actions for external hits
Nilay Vaish
2013-06-25
ruby: mesi cmp directory: separate actions for external hits
Nilay Vaish
2013-06-25
ruby: profiler: lots of inter-related changes
Nilay Vaish
2013-06-24
ruby: remove the three files related to profiling
Nilay Vaish
2013-06-24
ruby: MessageBuffer: Remove unused m_size variable
Joel Hestness ext:(%2C%20Nilay%20Vaish%20%3Cnilay%40cs.wisc.edu%3E)
2013-06-20
ruby: fix typo in MOESI_CMP_token protocol
Lena Olson
2013-06-18
ruby: Fix prefetching for MESI_CMP_Directory
Lena Olson
2013-06-18
ruby: fix slicc compiler to complain about duplicate symbols
Lena Olson
2013-06-18
ruby: restrict Address to being a type and not a variable name
Lena Olson
2013-06-18
x86: Add support for maintaining the x87 tag word
Andreas Sandberg
2013-06-18
x86: Fix loading of floating point constants
Andreas Sandberg
2013-06-18
x86: Initialize the MXCSR register
Andreas Sandberg
2013-06-18
x86: Make the boot state VMX compliant
Andreas Sandberg
2013-06-18
x86: Make fprem like the fprem on a real x87
Andreas Sandberg
2013-06-18
kvm: Use the address finalization code in the TLB
Andreas Sandberg
2013-06-18
x86: Add helper functions to access rflags
Andreas Sandberg
2013-06-18
x86: Fix the flag handling code in FABS and FCHS
Andreas Sandberg
2013-06-11
kvm: Add more VM stats
Andreas Sandberg
2013-06-11
kvm: Separate host frequency from simulated CPU frequency
Andreas Sandberg
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