Age | Commit message (Collapse) | Author |
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extra : convert_revision : 5c6251d962d9997676ffc795bb92eeb588caed39
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extra : convert_revision : 7fc6567ab3d35c06901e6c8a0435f7cab819e17e
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extra : convert_revision : 0b306dd96f5358474ad6a8bf4a949c12bcd139cd
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constructor. The intention is to allow them to modify the emulation environment struct before it's used to construct its microops.
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extra : convert_revision : b04fc9ead8e3322fc3af3f14d75e2206ddfbe561
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up \s correctly.
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extra : convert_revision : b4b790fb8cfd2a9e28568cf978eca70b1c65806b
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extra : convert_revision : 8af0dd9c16e7db8ed92f7a71c396841d5ae7e072
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"moreBytes" which just takes a MachInst.
src/arch/x86/predecoder.cc:
Seperate the pc-pc and the pc of the incoming bytes, and get rid of the "moreBytes" which just takes a MachInst. Also make the "opSize" field describe the number of bytes and not the log of the number of bytes.
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extra : convert_revision : 3a5ec7053ec69c5cba738a475d8b7fd9e6e6ccc0
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though.
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up correctly.
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extra : convert_revision : 9fc36b99c9027e35f22983d5d1e22c940fa093de
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extra : convert_revision : 20d517c4bc2aae54e53368c708b5abb27ed3a469
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into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
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extra : convert_revision : 1d2efac895a1c8328026a079e0b319a436325616
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extra : convert_revision : 948eceb59a1cd9b02ad9355dd5894af0bbec4e83
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extra : convert_revision : 0956b3d3532cba3856deda914d7cc708377b701b
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extra : convert_revision : 54a6b36dff3c15699faf2c767fc594359422c0ee
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extra : convert_revision : 58448b984447babba708b9dcb1b4939ed35308a6
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extra : convert_revision : 388c0d6f2af96c4d33c1fe5d42a21866a4d71556
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src/arch/x86/isa/formats/multi.isa:
Make the formats use objects to pass around output code.
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extra : convert_revision : 428915bda22e848befac15097f56375c1818426e
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extra : convert_revision : 7e9a1feb808604364584893eed1735a8da1556fb
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src/arch/x86/isa/macroop.isa:
Make microOp vs microop and macroOp vs macroop capitilization consistent. Also fill out the emulation environment handling a little more, and use an object to pass around output code.
src/arch/x86/isa/microops/base.isa:
Make microOp vs microop and macroOp vs macroop capitilization consistent. Also adjust python to C++ bool translation.
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extra : convert_revision : 6f4bacfa334c42732c845f9a7f211cbefc73f96f
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real thing. Also rename the null case to something that can
be a C++ symbol.
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extra : convert_revision : e3bfc4065b59c21f613e486d234711c48d7c9070
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the set memory mode code to only go through the change if
it is necessary
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extra : convert_revision : 28288227bb56b0a04d756776eaf0a4ff9e1f8c20
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using a divide in order to not loop forever after resuming from a checkpoint
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extra : convert_revision : 4bbc70b1be4e5c4ed99d4f88418ab620d5ce475a
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extra : convert_revision : 89636a7410dec54235416e3c16db98cc5eecf2b0
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src/arch/x86/isa/main.isa:
Clean up where files are included.
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extra : convert_revision : 0528359432bf0fb9198b63de9611176bc78e07c7
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extra : convert_revision : 62ad0839847db85738054da6f7da8a956b24143e
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into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
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extra : convert_revision : 4a2f2884a9d1125dc3156e080931ddc40defcfc7
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Also, the code is now a single string which runs through the microcode assembler rather than docstrings associated with classes named after each architectural level instruction.
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extra : convert_revision : 20e6d6ac625dde8f1885acc445882096df562778
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extra : convert_revision : 1854ebc00a9f3ae8c36cc579de6c3a2b48c0fdb6
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into zizzer.eecs.umich.edu:/tmp/newmem
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extra : convert_revision : e0721f59cce9cb356b53977e21bd4a7c779c217d
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Makes page table cache scheme actually work
src/mem/page_table.cc:
src/mem/page_table.hh:
fix caching scheme to actually work and improve performance
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extra : convert_revision : 443a8d8acbee540b26affcfdfbf107b8e735d1bd
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extra : convert_revision : f4883febd92cfade61c1a6a31fdb2d27296d9044
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into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
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extra : convert_revision : 77222b85492c8ad6c0b776fa34c83065c77c402e
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extra : convert_revision : 8ee88bff8010dcb7a412f6a6b49d40fad1c0bb68
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doesn't compile.
src/arch/x86/isa/decoder/one_byte_opcodes.isa:
src/arch/x86/isa/macroop.isa:
src/arch/x86/isa/main.isa:
src/arch/x86/isa/microasm.isa:
src/arch/x86/isa/microops/base.isa:
src/arch/x86/isa/microops/microops.isa:
src/arch/x86/isa/operands.isa:
src/arch/x86/isa/microops/regop.isa:
src/arch/x86/isa/microops/specop.isa:
Reworking x86's microcode system
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extra : convert_revision : cab66be59ed758b192226af17eddd5a86aa190f3
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bit in the ExtMachInst.
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extra : convert_revision : 87dc6e6b2281b6a11a0c0e8320b7f4acc29f6fb8
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extra : convert_revision : 8ceb816c17108d7cb65cb46d8dc2bd2753b0e0f0
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into zeep.pool:/z/saidi/work/m5.newmem
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extra : convert_revision : 43dc3a23758e7956572d59464ebddcc56e82728b
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into zeep.pool:/z/saidi/work/m5.newmem
src/cpu/simple/base.cc:
hand merge vincent/gabe/my changes to cast sizeof() to a 64bit int
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extra : convert_revision : eb989b4d65d08057df1777c04b8ee2cfa75a2695
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