Age | Commit message (Collapse) | Author |
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into zeep.eecs.umich.edu:/home/gblack/m5/newmemmemops
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into zed.eecs.umich.edu:/z/hsul/work/m5/newmem
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into zeep.pool:/z/saidi/work/m5.newmem
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align the character arrays that are used by placement-new for classes lest we have an unaligned fault on SPARC/Solaris
src/SConscript:
DWARF2 symbol support seems to be broken on Solaris. Use stabs+
src/base/statistics.hh:
align the character arrays that are used by placement-new for classes lest we have an unaligned fault on SPARC/Solaris
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extra : convert_revision : bc875a4fdfb4553062d3278537bc32a5ab9b6cca
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configs/common/Simulation.py:
simplify maxtick code a little bit - instead of checking for -1, just set it at MaxTick.
src/python/m5/__init__.py:
make a new m5 param called MaxTick.
src/sim/host.hh:
fix the M5 def. of MaxTick
src/sim/main.cc:
Simplify the MaxTick/num_cycles parsing within main.cc
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src/python/m5/objects/BaseCPU.py:
These parameters should have been removed in an earlier push.
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extra : convert_revision : 781b39ca370361e9568b1af0be96ff5848b1f3f4
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into zamp.eecs.umich.edu:/z/ktlim2/clean/newmem-busfix
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extra : convert_revision : 29426cebe81ac077c1a83f50e914ff6955ce81d4
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faults for ua2005, and commented out ones which are apparently dropped.
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into zeep.eecs.umich.edu:/home/gblack/m5/newmemmemops
src/arch/sparc/faults.hh:
Hand merged.
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Apparently, gdb expects to do single stepping on its own, so those functions panic for SPARC. acc still needs to be implemented.
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rename : src/kern/alpha/idle_event.cc => src/arch/alpha/idle_event.cc
rename : src/kern/alpha/idle_event.hh => src/arch/alpha/idle_event.hh
rename : src/kern/alpha/kernel_stats.cc => src/arch/alpha/kernel_stats.cc
rename : src/kern/alpha/kernel_stats.hh => src/arch/alpha/kernel_stats.hh
rename : src/kern/sparc/kernel_stats.hh => src/arch/sparc/kernel_stats.hh
rename : src/kern/base_kernel_stats.cc => src/kern/kernel_stats.cc
rename : src/kern/base_kernel_stats.hh => src/kern/kernel_stats.hh
extra : convert_revision : 42bd3e36b407edbd19b912c9218f4e5923a15966
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into zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/m5/newmemmemops
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src/python/m5/main.py:
add option to operate in lockstep with legion
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src/mem/bus.cc:
Fix up draining to work properly.
src/mem/bus.hh:
Initialize drainEvent to NULL.
src/mem/cache/base_cache.cc:
src/mem/cache/base_cache.hh:
Add draining to the caches.
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extra : convert_revision : 3082220a75d50876f10909f9f99bec535889f818
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src/dev/isa_fake.cc:
src/dev/isa_fake.hh:
No need for specialized init() function any more.
src/python/m5/objects/Tsunami.py:
Override responder when set by user. This avoids having bus.responder floating around and not doing anything when the user has specified their own default responder.
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src/cpu/o3/mem_dep_unit_impl.hh:
Initialize mem dep unit properly, add debug output.
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ISA independent by making it use the #define for branch delay slots (and NNPC)
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extra : convert_revision : b2631b1163397ecc99f2f315e2b88537e2002731
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base kernel_stats to base_kernel_stats
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SConstruct:
Put the code to make a switching header directory into a function so they are easy to make.
src/arch/SConscript:
Replace switching header code with the new function call.
src/kern/SConscript:
Created a new switching header directory in kern, and moved the declaration of some source files here.
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rename : src/kern/kernel_stats.cc => src/kern/base_kernel_stats.cc
rename : src/kern/kernel_stats.hh => src/kern/base_kernel_stats.hh
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