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AgeCommit message (Expand)Author
2013-05-30mem: Check for waiting state in bus drainingAndreas Hansson
2013-05-30mem: Add a LPDDR3-1600 configurationAndreas Hansson
2013-05-30mem: Adapt the LPDDR2 to match a single x32 channelAndreas Hansson
2013-05-30mem: Avoid explicitly zeroing the memory backing storeAndreas Hansson
2013-05-30base: Avoid size limitation on protobuf coded streamsAndreas Hansson
2013-05-30cpu: Make hash struct instead of class to please clangAndreas Hansson
2013-05-21ruby: slicc: fix error msg in TypeFieldMemberAST.pyMalek Musleh
2013-05-21x86: Squash outstanding walks when instructions are squashed.Gedare Bloom
2013-05-21x86: mark instructions for being function call/returnNilay Vaish
2013-05-21x86: add op class for int and fp microops in isa descriptionNilay Vaish
2013-05-21ruby: moesi hammer: cosmetic changesNilay Vaish
2013-05-21ruby: mesi cmp directory: cosmetic changesNilay Vaish
2013-05-21ruby: moesi cmp token: cosmetic changesNilay Vaish
2013-05-21ruby: moesi cmp directory: cosmetic changesNilay Vaish
2013-05-21ruby: add stats to .sm files, remove cache profilerNilay Vaish ext:(%2C%20Malek%20Musleh%20%3Cmalek.musleh%40gmail.com%3E)
2013-05-14cpu: remove local/globalHistoryBits params from branch predAnthony Gutierrez
2013-05-14kvm: Add support for disabling coalesced MMIOAndreas Sandberg
2013-05-14kvm: Dump state before panic in KVM exit handlersAndreas Sandberg
2013-05-14kvm: Fix the memory interface used by KVMAndreas Sandberg
2013-05-14arm: Add support for the m5fail pseudo-opAndreas Sandberg
2013-05-02kvm: Add a stat counting number of instructions executedAndreas Sandberg
2013-05-02kvm: Add checkpoint debug printAndreas Sandberg
2013-05-02kvm: Make MMIO requests uncacheableAndreas Sandberg
2013-05-02sim: Add support for m5fail in pseudoInst()Andreas Sandberg
2013-04-23x86: corrects vsyscall address for gettimeofdayMichael Levenhagen
2013-04-23x86: enable gettimeofday and getppid system callsMichael Levenhagen
2013-04-23sim: Fix two bugs relating to software caching of PageTable entries.Mitch Hayenga
2013-04-23cpu: Fix TraceGen flag initalisationAndreas Hansson
2013-04-23ruby: mesi coherence protocol: remove unused state M_MBNilay Vaish
2013-04-23x86: increment the stack pointer in lret instChristian Menard
2013-04-23ruby: patch checkpoint restore with garnetNilay Vaish
2013-04-22mem: Address mapping with fine-grained channel interleavingAndreas Hansson
2013-04-22mem: More descriptive enum names for address mappingAndreas Hansson
2013-04-22cpu: Use request flags in trace playbackAndreas Hansson
2013-04-22cpu: Make the generators usable outside the TrafficGen moduleAndreas Hansson
2013-04-22mem: Add a WideIO DRAM configurationAndreas Hansson
2013-04-22mem: Adding verbose debug output in the memory systemUri Wiener
2013-04-22mem: Replace check with panic where inhibited should not happenAndreas Hansson
2013-04-22kvm: Add support for pseudo-ops on ARMAndreas Sandberg
2013-04-22sim: Add a helper function to execute pseudo instructionsAndreas Sandberg
2013-04-22kvm: Add support for state dumping on ARMAndreas Sandberg
2013-04-22kvm: Add basic support for ARMAndreas Sandberg
2013-04-22arm: Add a method to query interrupt state ignoring CPSR masksAndreas Sandberg
2013-04-22kvm: Add experimental support for a perf-based execution timerAndreas Sandberg
2013-04-22kvm: Avoid synchronizing the TC on every KVM exitAndreas Sandberg
2013-04-22kvm: Basic support for hardware virtualized CPUsAndreas Sandberg
2013-04-22cpu: Let python scripts obtain the number of instructions executedTimothy M. Jones
2013-04-22arm: Enable support for triggering a sim panic on kernel panicsAndreas Sandberg
2013-04-22sim: separate nextCycle() and clockEdge() in clockedObjectsDam Sunwoo
2013-04-22cpu: generate SimPoint basic block vector profilesDam Sunwoo