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2009-05-11ruby: Working M5 interface and updated Ruby interface.Daniel Sanchez
This changeset also includes a lot of work from Derek Hower <drh5@cs.wisc.edu> RubyMemory is now both a driver for Ruby and a port for M5. Changed makeRequest/hitCallback interface. Brought packets (superficially) into the sequencer. Modified tester infrastructure to be packet based. and Ruby can be used together through the example ruby_se.py script. SPARC parallel applications work, and the timing *seems* right from combined M5/Ruby debug traces. To run, % build/ALPHA_SE/m5.debug configs/example/ruby_se.py -c tests/test-progs/hello/bin/alpha/linux/hello -n 4 -t
2009-05-11ruby: Check stderr and not stdin before hanging on an assert.Steve Reinhardt
2009-05-11ruby: decommission codePolina Dudnik
1. Set.* and BigSet.* are replaced with OptBigSet.* which was renamed Set.* 2. Decomissioned all bloom filters 3. Decomissioned ruby/simics directory
2009-05-11ruby: removed dead functions from the sequencerDerek Hower
2009-05-11ruby: Removed g_SIMULATING flagPolina Dudnik
1. removed checks from tester files 2. removed else clause in Sequencer and DirectoryMemory else clause is needed by the tester, it is up to Derek to revive it elsewhere when he gets to it Also: 1. Changed m_entries in DirectoryMemory to a map 2. And replaced SIMICS_read_physical_memory with a call to now-dummy Derek's-to-be readPhysMem function
2009-05-11ruby: Remove transactional access types (e.g. LD_XACT) from CacheRequestTypePolina Dudnik
1. Modified enumeration 2. Also modified profiler 3. Remove transactions from Tester 4. Edited XACT_MEM out of Synthetic Driver
2009-05-11ruby: reordered Debug and RubyConfig::init to fix segfaultPolina Dudnik
due to uninitialized output file pointer.
2009-05-11ruby: Disabled RubyEventQueue's deletion of its home-grown priority heap.Dan Gibson
Temporarily to fix unusual memory problem.
2009-05-11ruby: Migrate all of ruby and slicc to SCons.Nathan Binkert
Add the PROTOCOL sticky option sets the coherence protocol that slicc will parse and therefore ruby will use. This whole process was made difficult by the fact that the set of files that are output by slicc are not easily known ahead of time. The easiest thing wound up being to write a parser for slicc that would tell me. Incidentally this means we now have a slicc grammar written in python.
2009-05-11ruby: clean up a few warningsNathan Binkert
2009-05-11ruby: Fixed some unresolved references.Dan Gibson
2009-05-11ruby: Make ruby #includes use full paths to the files they're including.Nathan Binkert
This basically means changing all #include statements and changing autogenerated code so that it generates the correct paths. Because slicc generates #includes, I had to hard code the include paths to mem/protocol.
2009-05-11ruby: remove unnecessary code.Dan Gibson
1) Removing files from the ruby build left some unresovled symbols. Those have been fixed. 2) Most of the dependencies on Simics data types and the simics interface files have been removed. 3) Almost all mention of opal is gone. 4) Huge chunks of LogTM are now gone. 5) Handling 1-4 left ~hundreds of unresolved references, which were fixed, yielding a snowball effect (and the massive size of this delta).
2009-05-11ruby: Cleaned up sequencer. Removed LogTM specific code.Derek Hower
2009-05-11ruby: added Packet interface to makeRequest and isReady.Derek Hower
Also pushed Packet usage into the Sequencer
2009-05-11ruby: fold the debugging options into Debug.ccNathan Binkert
2009-05-11ruby: Renamed Ruby's EventQueue to RubyEventQueueDerek Hower
--HG-- rename : src/mem/ruby/eventqueue/EventQueue.cc => src/mem/ruby/eventqueue/RubyEventQueue.cc rename : src/mem/ruby/eventqueue/EventQueue.hh => src/mem/ruby/eventqueue/RubyEventQueue.hh rename : src/mem/ruby/eventqueue/EventQueueNode.cc => src/mem/ruby/eventqueue/RubyEventQueueNode.cc rename : src/mem/ruby/eventqueue/EventQueueNode.hh => src/mem/ruby/eventqueue/RubyEventQueueNode.hh
2009-05-11ruby: Removed System name clash by renaming ruby's System to RubySystemDaniel Sanchez
2009-05-11ruby: rename config.include to config.hh and clean up the macro stuff.Nathan Binkert
I did the macro cleanup because I was worried that the SCons scanner would get confused. This code will hopefully go away soon anyway. --HG-- rename : src/mem/ruby/config/config.include => src/mem/ruby/config/config.hh
2009-05-11ruby: strip out some unused definesNathan Binkert
2009-05-11ruby: Import ruby and slicc from GEMSNathan Binkert
We eventually plan to replace the m5 cache hierarchy with the GEMS hierarchy, but for now we will make both live alongside eachother.
2009-05-05cpus: fix cpu progress eventKorey Sewell
this was double scheduling itself (once in constructor and once in cpu code). also add support for stopping / starting progress events through repeatEvent flag and also changing the interval of the progress event as well
2009-05-04scons: re-work the *Source functions to take more information.Nathan Binkert
Start by turning all of the *Source functions into classes so we can do more calculations and more easily collect the data we need. Add parameters to the new classes for indicating what sorts of flags the objects should be compiled with so we can allow certain files to be compiled without Werror for example.
2009-04-26X86: Precompute the default and alternate address and operand size and the ↵Gabe Black
stack size.
2009-04-26X86: Split out the internal memory space from the regular translate() and ↵Gabe Black
precompute mode.
2009-04-26X86: Centralize updates to the handy M5 reg.Gabe Black
2009-04-26X86: Implement lowest priority interrupts more correctly.Gabe Black
Lowest priority interrupts are now delivered based on a rotating offset into the list of potential recipients. There could be parasitic cases were a processor gets picked on and ends up at that rotating offset all the time, but it's much more likely that the group will stay consistent and the pain will be distributed evenly.
2009-04-26X86: Tell the function that sends int messages who to send to instead of ↵Gabe Black
figuring it out itself.
2009-04-26X86: Make the local APICs register themselves with the IO APIC.Gabe Black
This is a hack so that the IO APIC can figure out information about the local APICs. The local APICs still have no way to find out about each other. Ideally, when the local APICs update state that's relevant to somebody else, they'd send an update to everyone. Without being able to do a broadcast, that would still require knowing who else there is to notify. Other broadcasts are implemented using assumptions that may not always be true.
2009-04-26X86: Record the initial APIC ID which identifies an APIC in M5.Gabe Black
The ID as exposed to software can be changed. Tracking those changes in M5 would be cumbersome, especially since there's no guarantee the IDs will remain unique.
2009-04-26X86, Config: Make makeX86System consider the number of CPUs, and clean up ↵Gabe Black
interrupt assignment.
2009-04-24SPARC: Tighten up the clone system call and SPARCs copyRegs.Gabe Black
2009-04-23request: reorganize flags to group related flags together.Steve Reinhardt
2009-04-23X86: Put the StoreCheck flag with the others, and don't collide with other ↵Gabe Black
flags.
2009-04-22stats: expose statistics to pythonNathan Binkert
2009-04-22stats: Move flags into info.hh and use base/flags.hh to manage the flagsNathan Binkert
2009-04-22stats: Shuffle around info stuff so it can be accessed separatelyNathan Binkert
2009-04-22stats: Rename the info classes to hopefully make things a bit clearerNathan Binkert
FooInfoBase became FooInfo FooInfo became FooInfoProxy
2009-04-22stats: remove simplescalar compatibility for printingNathan Binkert
2009-04-22stats: fix initialization bug in distribution text outputNathan Binkert
2009-04-22i8254xGBe: major style overhaul.Steve Reinhardt
Moved DescCache template functions from .hh to .cc file. Also fixed lots of line-wrapping problems, and some irregular indentation.
2008-07-16mem: use single BadAddr responder per system.Steve Reinhardt
Previously there was one per bus, which caused some coherence problems when more than one decided to respond. Now there is just one on the main memory bus. The default bus responder on all other buses is now the downstream cache's cpu_side port. Caches no longer need to do address range filtering; instead, we just have a simple flag to prevent snoops from propagating to the I/O bus.
2009-04-21Automated merge with ssh://m5sim.org//repo/m5Nathan Binkert
2009-04-21pseudo: only include kernel stats if FULL_SYSTEM.Nathan Binkert
2009-04-21arm: include missing file for armNathan Binkert
2009-04-21arm: Unify the ARM tlb. We forgot about this when we did the rest.Nathan Binkert
This code compiles, but there are no tests still
2009-04-21syscall_emul: style fixes (mostly wrapping overly long lines)Steve Reinhardt
2009-04-21syscall: Resolve conflicts between m5threads and Gabe's recent SE changes.Steve Reinhardt
2009-04-21Commit m5threads package.Daniel Sanchez
This patch adds limited multithreading support in syscall-emulation mode, by using the clone system call. The clone system call works for Alpha, SPARC and x86, and multithreaded applications run correctly in Alpha and SPARC.
2009-04-21SCons: Export export_vars so SConsopts files can add to themNathan Binkert