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2007-02-21Automatically generate m5/internal/__init__.py and swig/init.ccNathan Binkert
based on the swig modules that we have --HG-- extra : convert_revision : 2fd12db39d46608a62b9df36c2b36189f1d2bc30
2007-02-21Fix majory brokenness in my previous MySQL commit, basicallyNathan Binkert
this is just a shuffling around of code and fixes to make stuff commit properly --HG-- extra : convert_revision : a057f7fe4962cfc6200781ff66d2c26bf9c6eb8c
2007-02-21#include needed for compileNathan Binkert
--HG-- extra : convert_revision : fda9ab0d04f77f27810018a8639d6ea8abb59326
2007-02-18Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/work/m5.newmem --HG-- extra : convert_revision : 10d4dc08411c7a433a7194e94f69ca1d639a1ce7
2007-02-18implement vtophys and 32bit gdb supportAli Saidi
src/arch/alpha/vtophys.cc: src/arch/alpha/vtophys.hh: src/arch/sparc/arguments.hh: move Copy* to vport since it's generic for all the ISAs src/arch/sparc/isa_traits.hh: the Solaris kernel sets up a virtual-> real mapping for all memory starting at SegKPMBase src/arch/sparc/pagetable.hh: add a class for getting bits out of the TteTag src/arch/sparc/remote_gdb.cc: add 32bit support kinda.... If its 32 bit src/arch/sparc/remote_gdb.hh: Add 32bit register offsets too. src/arch/sparc/tlb.cc: cleanup generation of tsb pointers src/arch/sparc/tlb.hh: add function to return tsb pointers for an address make lookup public so vtophys can use it src/arch/sparc/vtophys.cc: src/arch/sparc/vtophys.hh: write vtophys for sparc src/base/bitfield.hh: return a mask of bits first->last src/mem/vport.cc: src/mem/vport.hh: move Copy* here since it's ISA generic --HG-- extra : convert_revision : c42c331e396c0d51a2789029d8e232fe66995d0f
2007-02-18Get rid of the stand alone ParamContext since all of theNathan Binkert
relevant stuff has now been moved to python. --HG-- extra : convert_revision : 608e5ffd0e2b33949a2b183117216f136cfa4484
2007-02-18Get rid of the Serialize and IntervalStats Param contextsNathan Binkert
since they're no longer used --HG-- extra : convert_revision : e39590aa03cc4c961d2eb5dab57862811f431e4d
2007-02-17Get rid of the Statistics and Statreset ParamContexts, andNathan Binkert
expose all of the relevant functionality to python. Clean up the mysql code while we're at it. --HG-- extra : convert_revision : 5b711202a5a452b8875ebefb136a156b65c24279
2007-02-17Check that there is a param context list before tryingNathan Binkert
to loop through it. This is more important as we get rid of param contexts --HG-- extra : convert_revision : 5a24048b5c3d609285da83dfcb106910afad6919
2007-02-17Remove the event_ignore stuff since it was never really usedNathan Binkert
--HG-- extra : convert_revision : ef5f3492e8232d08af7e1eae64ba96c79ca14b6f
2007-02-17Give the progress event its own priorityNathan Binkert
--HG-- extra : convert_revision : 6357ade64deb42fae68b2766545b1c4cdc673fc9
2007-02-17Default to tracing being disabled in C++, it will be turnedNathan Binkert
on in python. Fix the trace start code so it actually starts when it is suppsed to. Make the Exec tracing stuff obey the trace enabled flag. --HG-- extra : convert_revision : 634ba0b4f52345d4bf40d43e239cef7ef43e7691
2007-02-17Pass an exception from a python event through the event queueNathan Binkert
back into python so we don't just silently ignore those errors --HG-- extra : convert_revision : e2f5566a4681f1b8ea80af50071119118afa7d8a
2007-02-15Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/work/m5.newmem --HG-- extra : convert_revision : f9fd4df544144a691bb5956e3f84036a61822547
2007-02-15fixup remote gdb support for sparc fsAli Saidi
--HG-- extra : convert_revision : 5edf0ad492fe438d66bcf0ae469ef841cd71e157
2007-02-14Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmemGabe Black
into zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/m5/newmem --HG-- extra : convert_revision : 4878ca509f9982c065933a41ffc87808edb08b00
2007-02-14Force the st_blksize field of a stat call to be 8k.Gabe Black
--HG-- extra : convert_revision : 6cd2dc622ca95cc1ea89bd5e5cbf33d9510c351c
2007-02-13Make mulitple consoles work and be distinguishable from each otherAli Saidi
src/dev/alpha/tsunamireg.h: get rid of things that aren't really tsunami registers src/dev/platform.hh: src/dev/uart.cc: the uart pointer isn't used anymore src/dev/simconsole.cc: make the simconsole print something more useful to distinguish between various consoles in a single system src/dev/uart8250.hh: put the needed uart defines in here rather than including them from tsunamireg src/python/m5/objects/T1000.py: add a console to the T1000 config for the hypervisor --HG-- extra : convert_revision : 76ca92122e611eaf76b989bc699582eef8297be8
2007-02-13Update MIPS ISA description to work with new write result interfaceSteve Reinhardt
for store conditional. --HG-- extra : convert_revision : 73efd2ca17994e0e19c08746441874a2ac8183af
2007-02-13fix compiling problemsAli Saidi
--HG-- extra : convert_revision : 9ecfd5a0a151c03503e42faf98240da12fd719b1
2007-02-13Merge all of the execution trace configuration stuff intoNathan Binkert
the traceflags infrastructure. InstExec is now just Exec and all of the command line options are now trace options. --HG-- extra : convert_revision : 4adfa9dfbb32622d30ef4e63c06c7d87da793c8f
2007-02-13Rearrange traceflags.py so that the file generation only happens ifNathan Binkert
the script is invoked as main. This allows us to import traceflags.py if we just want the list of available flags. Embed traceflags.py into the zipfile so it can be accessed from the python side of things. With this, print an error on invalid flags and add --trace-help option that will print out the list of trace flags that are compiled in. If a flag is prefixed with a '-', now that flag will be disabled. --HG-- extra : convert_revision : 2260a596b07d127c582ff73474dbbdb0583db524
2007-02-12some forgotten commitsAli Saidi
--HG-- extra : convert_revision : 213440066c700ed5891a6d4568928b7f3f2fe750
2007-02-12make hver match legionAli Saidi
--HG-- extra : convert_revision : 5bfe4b943ca5b3e30a7097a46cab4f93dadd714f
2007-02-12Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/work/m5.newmem src/cpu/simple/atomic.cc: merge steve's changes in. --HG-- extra : convert_revision : a17eda37cd63c9380af6fe68b0aef4b1e1974231
2007-02-12rename store conditional stuff as extra data so it can be used for ↵Ali Saidi
conditional swaps as well Add support for a twin 64 bit int load Add Memory barrier and write barrier flags as appropriate Make atomic memory ops atomic src/arch/alpha/isa/mem.isa: src/arch/alpha/locked_mem.hh: src/cpu/base_dyn_inst.hh: src/mem/cache/cache_blk.hh: src/mem/cache/cache_impl.hh: rename store conditional stuff as extra data so it can be used for conditional swaps as well src/arch/alpha/types.hh: src/arch/mips/types.hh: src/arch/sparc/types.hh: add a largest read data type for statically allocating read buffers in atomic simple cpu src/arch/isa_parser.py: Add support for a twin 64 bit int load src/arch/sparc/isa/decoder.isa: Make atomic memory ops atomic Add Memory barrier and write barrier flags as appropriate src/arch/sparc/isa/formats/mem/basicmem.isa: add post access code block and define a twinload format for twin loads src/arch/sparc/isa/formats/mem/blockmem.isa: remove old microcoded twin load coad src/arch/sparc/isa/formats/mem/mem.isa: swap.isa replaces the code in loadstore.isa src/arch/sparc/isa/formats/mem/util.isa: add a post access code block src/arch/sparc/isa/includes.isa: need bigint.hh for Twin64_t src/arch/sparc/isa/operands.isa: add a twin 64 int type src/cpu/simple/atomic.cc: src/cpu/simple/atomic.hh: src/cpu/simple/base.hh: src/cpu/simple/timing.cc: add support for twinloads add support for swap and conditional swap instructions rename store conditional stuff as extra data so it can be used for conditional swaps as well src/mem/packet.cc: src/mem/packet.hh: Add support for atomic swap memory commands src/mem/packet_access.hh: Add endian conversion function for Twin64_t type src/mem/physical.cc: src/mem/physical.hh: src/mem/request.hh: Add support for atomic swap memory commands Rename sc code to extradata --HG-- extra : convert_revision : 69d908512fb34a4e28b29a6e58b807fb1a6b1656
2007-02-12Merge zizzer.eecs.umich.edu:/bk/newmemSteve Reinhardt
into vm1.(none):/home/stever/bk/newmem-head --HG-- extra : convert_revision : 496428e23050122a8a0029e5fddea261bef5729e
2007-02-12Move store conditional result checking from SimpleAtomicCpu writeSteve Reinhardt
function into Alpha ISA description. write now just generically returns a result value if the res pointer is non-null (which means we can only provide a res pointer if we expect a valid result value). --HG-- extra : convert_revision : fb1c315515787f5fbbf7d1af7e428bdbfe8148b8
2007-02-12cleanupNathan Binkert
--HG-- extra : convert_revision : 84114216854dfcd468115bbf5398333e98056a58
2007-02-10Clean up tracing stuff more, get rid of the trace log sinceNathan Binkert
its not all that useful. Fix a few bugs with python/C++ integration. --HG-- extra : convert_revision : a706512f7dc8b0c88f1ff96fe35ab8fbf9548b78
2007-02-09Get rid of the Random context and add the support directly to python.Nathan Binkert
We don't currently use randomness much, so I didn't go too far, but in the future, we may want to actually expose the random number values themselves to python. For now, I'll at least let you seed it. While we're at it, clean up a clearly bad way for generating random doubles. --HG-- extra : convert_revision : df2aa8b58dd0d9c2a7c771668a760b2df8db1e11
2007-02-09Clean up from my last commit to the trace stuff.Nathan Binkert
--HG-- extra : convert_revision : b6a975d1c4195a764ba875bc3aaaa064be4955b7
2007-02-09Get rid of the Trace ParamContext and give python directNathan Binkert
access to enabling/disabling tracing. Command line is unchanged except for the removal of --trace-cycle since it's not so clear what that means. --HG-- extra : convert_revision : c0164d92d3615d76d0c6acaabaafd92a9278212a
2007-02-08Use c99 variadic macros for non gnu compilersNathan Binkert
--HG-- extra : convert_revision : 4e9fda42e9f5ed3e9f66e5bd178c45537792073b
2007-02-07Get rid of the gross operator,()/variadic macro hackNathan Binkert
that made ccprintf and friends work, turn it into a normal function (though it still has a slightly strange implementation.) All instances of variadic macros are not yet removed, but I know how, and it will happen. One side effect of this new implementation is that a cprintf statement can now only have 16 parameters, though it's easy enough to raise this number if needed. --HG-- extra : convert_revision : 85cb3c17f8e2ecf9cd2f31ea80a760a28ea127a7
2007-02-07Quick program to time how long ccprintf takes to writeNathan Binkert
to a stream compared to sprintf to a buffer. --HG-- extra : convert_revision : de80724943d18aa110aa39cde9414252d9a7944c
2007-02-07Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmemSteve Reinhardt
into zizzer.eecs.umich.edu:/z/stever/bk/newmem-head --HG-- extra : convert_revision : c56b8160b403fde235636ca5b5b4cecd206ffa4c
2007-02-07Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/work/m5.newmem --HG-- extra : convert_revision : 60aabc4b93ef9d742f7e07363bd51f24170b85b8
2007-02-07Merge zizzer.eecs.umich.edu:/bk/newmemSteve Reinhardt
into vm1.(none):/home/stever/bk/newmem-head --HG-- extra : convert_revision : c2350e01a052114a264f26551b13fca03a835c61
2007-02-07Make memory commands dense again to avoid cache stat table explosion.Steve Reinhardt
Created MemCmd class to wrap enum and provide handy methods to check attributes, convert to string/int, etc. --HG-- extra : convert_revision : 57f147ad893443e3a2040c6d5b4cdb1a8033930b
2007-02-06More DPRINTF cleanup.Steve Reinhardt
--HG-- extra : convert_revision : db89cea42b46476d19333038522a6c144eafdab1
2007-02-06Initialize the variable to something.Nathan Binkert
--HG-- extra : convert_revision : bfe1e70130719ff239987d725b089c6d7152c541
2007-02-06Include compiler.hh since we use some of the #definesNathan Binkert
--HG-- extra : convert_revision : 1040addcf3f52d8d9fed2930890dadf524205af9
2007-02-06Minor DPRINTF fixes.Steve Reinhardt
--HG-- extra : convert_revision : 41956c9a480163ecac7807982215027e8ff1a4a9
2007-02-06merge my index fix and lisa's fixAli Saidi
--HG-- extra : convert_revision : 5f2c7d46c96fa061bbfb66edf188d405ca600020
2007-02-06Fix for LL/SC that Ron sent me.Kevin Lim
--HG-- extra : convert_revision : b3510a23d8a9eb466939f38491a109c3a65a7363
2007-02-06more fp fixesAli Saidi
fix unaligned accesses in mmaped disk device src/arch/sparc/isa/decoder.isa: get (ld|st)fsr ops working right. In reality the fp enable check needs to go higher up in the emitted code src/arch/sparc/isa/formats/basic.isa: move the cexec into the aexec field src/cpu/exetrace.cc: copy the exception state from legion when we get it wrong. We aren't going to get it right without an fp emulation layer src/dev/sparc/mm_disk.cc: src/dev/sparc/mm_disk.hh: fix unaligned accesses in the memory mapped disk device --HG-- extra : convert_revision : aaa33096b08cf0563fe291d984a87493a117e528
2007-02-06Fix for previous commit: need to ifdef NDEBUG on theSteve Reinhardt
definition as well as the declaration. --HG-- extra : convert_revision : 4f073fa6b47bf21abf58d92cb1c9eed699c9c89e
2007-02-05Use an instance counter to give Events repeatable IDsSteve Reinhardt
in debugging mode (especially valuable for tracediff). --HG-- extra : convert_revision : 227434a06b5271a8300f2f6861bd06c4ac19e6c4
2007-02-02more sparc fixesAli Saidi
src/arch/sparc/isa/decoder.isa: fix rdgsr fault check src/arch/sparc/tlb.cc: block asis are now supported --HG-- extra : convert_revision : cf55d648d2c5184fab03b6fe057d0e33c1dfc393
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-07 05:49:34 +0000