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Age
Commit message (
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Author
2013-04-17
arm: set ldr_ret_uop as conditional or unconditional control
Nathanael Premillieu
2013-04-17
ruby: moesi cmp directory: add copyright notice
Nilay Vaish
2013-04-17
dev: Fix a bug in the use of seekp/seekg
Andreas Hansson
2013-04-09
Ruby: Fix RubyPort evict packet memory leak
Joel Hestness
2013-04-09
Ruby: Delete packet requests during warmup
Joel Hestness
2013-04-09
Ruby: Add field to slicc machine for generic type
Joel Hestness
2013-04-09
Ruby: Order profilers based on version
Joel Hestness
2013-04-09
Ruby: More descriptive message buffer connection fatal
Jason Power
2013-04-09
Ruby: Fix typo in Slicc if-statement AST error
Jason Power
2013-04-07
Ruby System, Cache Recorder: Use delete [] for trace vars
Joel Hestness
2013-03-29
o3cpu: commit: changes interrupt handling
Nilay Vaish
2013-03-28
x86: changes to apic, keyboard
Nilay Vaish
2013-03-27
mem: Fix cache latency bug
Mitch Hayenga
2013-03-27
scons: don't die on warnings in swig-generated code
Steve Reinhardt
2013-03-26
mem: Cancel cache retry event when blocking port
Rene de Jong
2013-03-26
mem: Separate waiting for the bus and waiting for a peer
Andreas Hansson
2013-03-26
mem: Introduce a variable for the retrying port
Andreas Hansson
2013-03-26
mem: Add a generic id field to the packet trace
Andreas Hansson
2013-03-26
mem: Add optional request flags to the packet trace
Andreas Hansson
2013-03-26
cpu: Remove CpuPort and use MasterPort in the CPU classes
Andreas Hansson
2013-03-22
ruby: slicc: set sender, receiver clock objs for optional queue
Nilay Vaish
2013-03-22
ruby: message buffer: correct previous errors
Nilay Vaish
2013-03-22
ruby: message buffer: remove _ptr from some variables
Nilay Vaish
2013-03-22
ruby: message buffer node: used Tick in place of Cycles
Nilay Vaish
2013-03-22
ruby: consumer: avoid using receiver side clock
Nilay Vaish
2013-03-22
ruby: remove unsued profile functions
Nilay Vaish
2013-03-22
ruby: keep histogram of outstanding requests in seq
Nilay Vaish
2013-03-22
slicc: remove check if the L1Cache has a sequencer
Nilay Vaish
2013-03-22
ruby: move stall and wakeup functions to AbstractController
Nilay Vaish
2013-03-22
ruby: connect two controllers using only message buffers
Nilay Vaish
2013-03-22
ruby: convert Topology to regular class
Nilay Vaish
2013-03-22
ruby: network: move routers from topology to network
Nilay Vaish
2013-03-20
cpu: Avoid including inorder TLBUnit to avoid gcc LTO bug
Andreas Hansson
2013-03-18
mem: Fix missing delete of packet in DRAM access
Andreas Hansson
2013-03-15
ruby: set: corrects csprintf() call introduced by 7d95b650c9b6
Nilay Vaish
2013-03-12
cpu: Fix state transition bug in the traffic generator
Andreas Sandberg
2013-03-11
x86: implement some of the x87 instructions
Nilay Vaish
2013-03-07
base: Fix address range granularity calculations
Andreas Hansson
2013-03-07
ruby: Fix gcc 4.8 maybe-uninitialized compilation error
Andreas Hansson
2013-03-07
x86: Make the table walker reset the packet delay
Andreas Hansson
2013-03-06
ruby: remove the functional copy of memory in se mode
Nilay Vaish
2013-03-06
ruby: garnet: fixed: implement functional access
Nilay Vaish
2013-03-04
cpu: fix a switching issue with the o3 cpu.
Ali Saidi
2013-03-04
ARM: fix some cases where instructions that write to fp reg 15 are accidently...
Ali Saidi
2013-03-02
ruby: fixes functional writes to RubyRequest
Blake Hechtman ext:(%2C%20Nilay%20Vaish%20%3Cnilay%40cs.wisc.edu%3E)
2013-03-02
sim: remove duplicate check on stack size
Nilay Vaish
2013-03-01
mem: Add check if SimpleDRAM nextReqEvent is scheduled
Andreas Hansson
2013-03-01
mem: Add a method to build multi-channel DRAM configurations
Andreas Hansson
2013-03-01
mem: SimpleDRAM variable naming and whitespace fixes
Andreas Hansson
2013-03-01
mem: Add support for multi-channel DRAM configurations
Andreas Hansson
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