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AgeCommit message (Expand)Author
2014-02-05sim: bump checkpoint version for multiple event queuesCurtis Dunham
2014-08-13arm: change MISCREG_L2ERRSR to warn not failDam Sunwoo
2014-08-13sim: remove kernel mapping check for baremetal workloadsDam Sunwoo
2014-08-13scons: Build the branch predictor for all CPUsAndreas Sandberg
2014-08-13mips: Remove unused private members to fix compile-time warningAndreas Sandberg
2014-08-13power: Remove unused private members to fix compile-time warningAndreas Sandberg
2014-08-13scons: Silence clang 3.4 warnings on Ubuntu 12.04Andreas Sandberg
2014-08-13base: Remove unused M5_PRAGMA_NORETURNAndreas Sandberg
2014-08-13cpu: Don't forward declare RefCountingPtrAndreas Sandberg
2014-08-13mem: Properly set cache block status fields on writebacksMitch Hayenga
2014-08-13cpu: Modernise the branch predictor (STL and C++11)Andreas Hansson
2014-03-11arm: remove dead code fplib mul64x64Curtis Dunham
2014-08-10config: Add SubSystem container for simobjectsGeoffrey Blake
2014-08-10config: Add hooks to enable new config sysGeoffrey Blake
2014-08-10cpu: Ensure the traffic generator suppresses non-memory packetsAndreas Hansson
2014-08-10base: Remove unused filesAndreas Hansson
2014-07-28mem: refactor LRU cache tags and add random replacement tagsAnthony Gutierrez
2014-07-23cpu: `Minor' in-order CPU modelAndrew Bardsley
2014-07-19syscall emulation: fix fast build issueSteve Reinhardt
2014-07-18x86: make PioBus return BadAddress errorsBinh Pham
2014-07-18sim: remove unused MemoryModeStrings arraySteve Reinhardt
2014-07-18kern: get rid of unused linux syscall filesSteve Reinhardt
2014-07-18syscall emulation: fix DPRINTF arg ordering bugSteve Reinhardt
2014-07-09base: fix operator== for comparing EthAddr objectsAnthony Gutierrez
2014-07-02base: fix some bugs in EthAddrAnthony Gutierrez
2014-07-01util: Add DVFS perfLevel to checkpoint upgrade scriptRadhika Jagtap
2014-06-30power: Add basic DVFS support for gem5Stephan Diestelhorst
2014-06-30mem: DRAMPower trace outputAndreas Hansson
2014-06-30mem: Add bank and rank indices as fields to the DRAM bankAndreas Hansson
2014-06-30mem: Extend DRAM row bits from 16 to 32 for larger densitiesAndreas Hansson
2014-06-30cpu: implement a bi-mode branch predictorAnthony Gutierrez
2014-06-21x86: fix table walker assertionBinh Pham
2014-06-21o3: make dispatch LSQ full check more selectiveBinh Pham
2014-06-21o3: split load & store queue full cases in renameBinh Pham
2014-06-10scons: Bump the compiler version to gcc 4.6 and clang 3.0Andreas Hansson
2014-06-09sim: More rigorous clocking commentsJoel Hestness
2014-05-31style: eliminate equality tests with true and falseSteve Reinhardt
2014-05-23ruby: slicc: remove unused ids DNUCA*Nilay Vaish
2014-05-23ruby: remove old protocol documentationNilay Vaish
2014-05-23ruby: message buffer: drop dequeue_getDelayCycles()Nilay Vaish
2014-05-23cpu: o3: remove stat totalCommittedInstsNilay Vaish
2014-05-12syscall emulation: clean up & comment SyscallReturnSteve Reinhardt
2014-05-09mem: Update DDR3 and DDR4 based on datasheetsAndreas Hansson
2014-05-09mem: Add DRAM cycle timeAndreas Hansson
2014-05-09mem: Simplify DRAM response schedulingAndreas Hansson
2014-05-09mem: Add precharge all (PREA) to the DRAM controllerAndreas Hansson
2014-05-09mem: Remove printing of DRAM paramsAndreas Hansson
2014-05-09mem: Add tRTP to the DRAM controllerAndreas Hansson
2014-05-09mem: Merge DRAM latency calculation and bank state updateAndreas Hansson
2014-05-09mem: Add tWR to DRAM activate and precharge constraintsAndreas Hansson
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