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AgeCommit message (Expand)Author
2013-02-10base: add some mathematical operators to Cycles classNilay Vaish
2013-02-10ruby: modifies histogram add() functionNilay Vaish
2013-02-10ruby: record fully busy cycle with in the controllerNilay Vaish
2013-02-10base: Fix broken IPython argument handlingAndreas Sandberg
2013-01-31sim: remove unused struct priority_compareNilay Vaish
2013-01-31ruby: correct computation of number of bits required for addressNilay Vaish
2013-01-31mem: Add comments for the DRAM address decodingAndreas Hansson
2013-01-31mem: Add DDR3 and LPDDR2 DRAM controller configurationsAndreas Hansson
2013-01-31mem: Add tTAW and tFAW to the SimpleDRAM modelAni Udipi
2013-01-31mem: Separate out the different cases for DRAM bus busy timeAndreas Hansson
2013-01-28cache: remove drainManager because it's not usedAnthony Gutierrez
2013-01-28ruby: remove get_time()Nilay Vaish
2013-01-28ruby: remove call to curCycle in panic()Nilay Vaish
2013-01-24branch predictor: move out of o3 and inorder cpusNilay Vaish ext:(%2C%20Timothy%20Jones%20%3Ctimothy.jones%40cl.cam.ac.uk%3E)
2013-01-22o3 cpu: fix zero reg problemAndrea Pellegrini
2013-01-22x86, cpu: corrects 270c9a75e91f, take over decoder on cpu switchNilay Vaish
2013-01-19O3 IEW: Make incrWb and decrWb clearerJoel Hestness
2013-01-17ruby: remove calls to g_system_ptr->getTime()Nilay Vaish
2013-01-15x86 cpuid: enable clflushNilay Vaish
2013-01-15x86: implements fsin, fcos instructionsNilay Vaish
2013-01-15x86: implements emms instructionNilay Vaish
2013-01-15x86: implement fabs, fchs instructionsNilay Vaish
2013-01-14ruby sequencer: converts cycles to ticks in deadlock panic()Malek Musleh
2013-01-14Ruby: remove reference to g_system_ptr from class MessageNilay Vaish
2013-01-14Ruby: use ClockedObject in Consumer classNilay Vaish
2013-01-14scons: Address clang 3.2 compilation errorAndreas Hansson
2013-01-12base simple cpu: removes commented out code about cache opsNilay Vaish
2013-01-12x86: Changes to decoder, corrects 9376Nilay Vaish
2013-01-08util: add m5_fail op.Lluís Vilanova
2013-01-08sim: Fix early termination in multi-core simulation under SE mode.Tao Zhang
2013-01-08arm: add access syscall for ARM SE modeMitch Hayenga
2013-01-08mem: Make LL/SC locks fine grainedMitch Hayenga
2013-01-08mem: Fix use-after-free bugMitch Hayenga
2013-01-07dev: Fix infinite recursion in DMA devicesAndreas Sandberg
2013-01-07stats: Fix swig wrapping for Tick in statsSascha Bischoff
2013-01-07cpu: Unify the serialization code for all of the CPU modelsAndreas Sandberg
2013-01-07cpu: Flush TLBs on switchOut()Andreas Sandberg
2013-01-07mem: Fix guest corruption when caches handle uncacheable accessesAndreas Sandberg
2013-01-07cpu: Rewrite O3 draining to avoid stopping in microcodeAndreas Sandberg
2013-01-07cpu: Make sure that a drained atomic CPU isn't executing ucodeAndreas Sandberg
2013-01-07cpu: Make sure that a drained timing CPU isn't executing ucodeAndreas Sandberg
2013-01-07cpu: Fix broken thread context handoverAndreas Sandberg
2013-01-07cpu: Fix O3 LSQ debug dumping constness and formattingAndreas Sandberg
2013-01-07arm: Invalidate cached TLB configuration in drainResumeAndreas Sandberg
2013-01-07arm: Fix draining of the pagetable walker when squashingAndreas Sandberg
2013-01-07cpu: Fix broken squashAfter implementation in O3 CPUAndreas Sandberg
2013-01-07o3 cpu: Remove unused variablesAndreas Sandberg
2013-01-07sim: Remove unused variablesAndreas Sandberg
2013-01-07cpu: Rename defer_registration->switched_outAndreas Sandberg
2013-01-07cpu: Remove unused params.hh header file in inorder CPUAndreas Sandberg
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