gem5 - gem5

Age	Commit message (Expand)	Author
2017-09-11	stats: Move the swpipl function into the Alpha kernel stats.	Gabe Black
2017-09-11	stats: Get rid of some kernel stats related cruft.	Gabe Black
2017-09-06	cpu: Fix bi-mode branch predictor thresholds	Rico Amslinger
2017-09-01	cpu-minor: Fix for addr range coverage calculation	Pau Cabre
2017-08-30	arch-arm: Only increment SW PMU counters on writes to PMSWINC	Jose Marinho
2017-08-30	arch-arm: Add missing override keywords in fault.hh	Andreas Sandberg
2017-08-30	arch-x86: Add missing override in the X86 TLB	Andreas Sandberg
2017-08-30	arch-sparc: Add a FaultVals instantiation for VecDisabled	Andreas Sandberg
2017-08-30	arch-alpha: Add missing overrides	Andreas Sandberg
2017-08-30	python: Make GlobalExitEvent.getCode() return an int	Andreas Sandberg
2017-08-30	cpu-o3: fix data pkt initialization for split load	Matthias Hille
2017-08-28	x86: Use the new CondInst format for moves to/from control registers.	Gabe Black
2017-08-28	x86: Add a "CondInst" format for conditionally decoded instructions.	Gabe Black
2017-08-12	dev: Fix an IDE error check.	Gabe Black
2017-08-08	mem-cache: Delete squashed HWPrefetches	Pau Cabre
2017-08-02	base: Give more information when setting up asynchronous IO fails.	Gabe Black
2017-08-01	arch-arm: Use named constants for m5op instructions	Andreas Sandberg
2017-08-01	sim: Use named constants for pseudo ops	Andreas Sandberg
2017-08-01	kvm, arm: Switch to the device EQ when accessing ISA devices	Andreas Sandberg
2017-08-01	kvm: Add a helper method to access device event queues	Andreas Sandberg
2017-08-01	cpu, kvm: Fix deadlock issue when resuming a drained system	Andreas Sandberg
2017-08-01	arch-arm: Switch to DTOnly as the default machine type	Andreas Sandberg
2017-07-20	sim: Prevent segfault in the wakeCpu m5op if id is invalid	Jose Marinho
2017-07-19	cpu: Add missing rename of vector registers in the O3 CPU	Rekai Gonzalez-Alberquilla
2017-07-17	cpu,o3: Fixed checkpointing bug occuring in the o3 CPU	Anouk Van Laer
2017-07-17	sim, x86: Make clone a virtual function	Sean Wilson
2017-07-17	x86: Add stats to X86 TLB	Swapnil Haria
2017-07-17	riscv: Define register index constants using literals	Alec Roelke
2017-07-14	riscv: Disambiguate between the C and C++ versions of isnan and isinf.	Gabe Black
2017-07-14	riscv: Fix bugs with RISC-V decoder and detailed CPUs	Alec Roelke
2017-07-14	riscv: Add unused attribute to some registers.hh constants	Alec Roelke
2017-07-13	arch-arm: fix ldm of pc interswitching branch	Gedare Bloom
2017-07-12	ruby: Refactor some Event subclasses to lambdas	Sean Wilson
2017-07-12	arm: Refactor some Event subclasses to lambdas	Sean Wilson
2017-07-12	dev: Refactor some Event subclasses to lambdas	Sean Wilson
2017-07-12	net: Refactor some Event subclasses to lambdas	Sean Wilson
2017-07-12	testers: Refactor some Event subclasses to lambdas	Sean Wilson
2017-07-12	kvm, mem: Refactor some Event subclasses into lambdas	Sean Wilson
2017-07-12	cpu: Refactor some Event subclasses to lambdas	Sean Wilson
2017-07-12	gpu-compute: Refactor some Event subclasses to lambdas	Sean Wilson
2017-07-12	sim, gdb: Refactor some Event subclasses into lambdas	Sean Wilson
2017-07-12	mips, x86: Refactor some Event subclasses into lambdas	Sean Wilson
2017-07-12	cpu, sim: Add param to force CPUs to wait for GDB	Jose Marinho
2017-07-11	arch-riscv: Add support for compressed extension RV64C	Alec Roelke
2017-07-11	arch-riscv: Restructure ISA description	Alec Roelke
2017-07-10	dev-arm: Add ID registers to the GIC model	Jose Marinho
2017-07-10	arch-arm: Support PMU evens in the 0x4000-0x4040 range	Jose Marinho
2017-07-10	dev-arm: Don't unconditionally overwrite bootloader params	Jose Marinho
2017-07-10	dev: Fix OnIdle test in DmaReadFifo	Rohit Kurup
2017-07-10	dev: Fix address type promotion issues in VirtIO devices	Sascha Bischoff