Age | Commit message (Collapse) | Author | |
---|---|---|---|
2009-07-16 | merge | Polina Dudnik | |
2009-07-16 | X86: Add range checks for miscreg indexing utility functions. | Gabe Black | |
2009-07-16 | X86: Take limitted advantage of the compilers type checking for microop ↵ | Gabe Black | |
operands. | |||
2009-07-16 | X86: Fix a number of places where the wrong form of a microop was used. | Gabe Black | |
2009-07-16 | X86: Fix x87 stack register indexing. | Gabe Black | |
2009-07-15 | Tester update | Polina Dudnik | |
2009-07-14 | Merge with head. | Gabe Black | |
2009-07-14 | ARM: Fix the "open" flag constants. | Jack Whitham | |
2009-07-13 | Changed the state machine to generate code such that multiple processors can ↵ | Polina Dudnik | |
make atomic requests at once | |||
2009-07-13 | 1. Got rid of unused functions in DirectoryMemory | Polina Dudnik | |
2. Reintroduced RMW_Read and RMW_Write 3. Defined -2 in the Sequencer as well as made a note about mandatory queue Did not address the issues in the slicc because remaking the atomics altogether to allow multiple processors to issue atomic requests at once | |||
2009-07-13 | merge | Derek Hower | |
2009-07-13 | regression: updated memtest-ruby stats | Derek Hower | |
This also includes a change to the default Ruby random seed, which was previously set using the wall clock. It is now set to 1234 so that the stat files don't change for the regression tester. | |||
2009-07-13 | Changes to add tracing and replaying command-line options | Polina Dudnik | |
Trace is automatically ended upon a manual checkpoint | |||
2009-07-13 | Locked requests should actually be converted to ST rather than ATOMIC, ↵ | Polina Dudnik | |
because ATOMIC is for RMW. | |||
2009-07-13 | Added atomics implementation which would work for MI_example | Polina Dudnik | |
2009-07-13 | Minor fixes for compiling | Polina Dudnik | |
2009-07-13 | Replaced RMW with Locked. RMW will be used for the coherence-aided atomics ↵ | Polina Dudnik | |
other than LLSC | |||
2009-07-13 | Moved the lock check and clearing the lock into makeRequest | Polina Dudnik | |
2009-07-13 | Forgot to replace one of the RubyRequest_RMW | Polina Dudnik | |
2009-07-13 | Reintegrated Derek's functional implementation of atomics with a minor ↵ | Polina Dudnik | |
change: don't clear lock on failure | |||
2009-07-10 | ISAs: Get rid of the IControl operand type. | Gabe Black | |
A separate operand type is not necessary to use two bitfields to generate the index. | |||
2009-07-10 | SPARC: Set up a lookup table for integer register flattening. | Gabe Black | |
Using a look up table changed the run time of the SPARC_FS solaris boot regression from: real 14m45.951s user 13m57.528s sys 0m3.452s to: real 12m19.777s user 12m2.685s sys 0m2.420s | |||
2009-07-09 | X86: Fold the MiscRegFile all the way into the ISA object. | Gabe Black | |
2009-07-09 | SPARC: Fold the MiscRegFile all the way into the ISA object. | Gabe Black | |
2009-07-09 | MIPS: Fold the MiscRegFile all the way into the ISA object. | Gabe Black | |
2009-07-09 | ARM: Fold the MiscRegFile all the way into the ISA object. | Gabe Black | |
2009-07-09 | Alpha: Missed a file in an earlier changeset. | Gabe Black | |
2009-07-08 | Get rid of the unused get(Data|Inst)Asid and (inst|data)Asid functions. | Gabe Black | |
2009-07-08 | Alpha: Pull the MiscRegFile fully into the ISA object. | Gabe Black | |
2009-07-08 | Registers: Add a registers.hh file as an ISA switched header. | Gabe Black | |
This file is for register indices, Num* constants, and register types. copyRegs and copyMiscRegs were moved to utility.hh and utility.cc. --HG-- rename : src/arch/alpha/regfile.hh => src/arch/alpha/registers.hh rename : src/arch/arm/regfile.hh => src/arch/arm/registers.hh rename : src/arch/mips/regfile.hh => src/arch/mips/registers.hh rename : src/arch/sparc/regfile.hh => src/arch/sparc/registers.hh rename : src/arch/x86/regfile.hh => src/arch/x86/registers.hh | |||
2009-07-08 | Registers: Collapse ARM and MIPS regfile directories. | Gabe Black | |
--HG-- rename : src/arch/arm/regfile/misc_regfile.hh => src/arch/arm/misc_regfile.hh rename : src/arch/arm/regfile/regfile.cc => src/arch/arm/regfile.cc rename : src/arch/mips/regfile/misc_regfile.cc => src/arch/mips/misc_regfile.cc rename : src/arch/mips/regfile/misc_regfile.hh => src/arch/mips/misc_regfile.hh | |||
2009-07-08 | Alpha: Move reg_redir into its own files, and move some constants into ↵ | Gabe Black | |
regfile.hh. | |||
2009-07-08 | Registers: Eliminate the ISA defined RegFile class. | Gabe Black | |
2009-07-08 | Alpha: Get rid of function prototypes with no implementations. | Gabe Black | |
2009-07-08 | Registers: Move the PCs out of the ISAs and into the CPUs. | Gabe Black | |
2009-07-08 | ARM, Simple CPU: Fix an index and add assert checks. | Gabe Black | |
2009-07-08 | MIPS: Get rid of an orphaned MIPS .cc file. | Gabe Black | |
2009-07-08 | Alpha: Phase out Alpha's intregfile.hh and intregfile.cc. | Gabe Black | |
2009-07-08 | SPARC: Phase out SPARC's intregfile.hh. | Gabe Black | |
2009-07-08 | X86: Phase out x86's intregfile.hh. | Gabe Black | |
2009-07-08 | MIPS: Phase out MIPS's int_regfile.hh. | Gabe Black | |
2009-07-08 | ARM: Flush out the ARM's int_regfile.hh. | Gabe Black | |
2009-07-08 | Registers: Eliminate the ISA defined integer register file. | Gabe Black | |
2009-07-08 | Registers: Eliminate the ISA defined floating point register file. | Gabe Black | |
2009-07-08 | Registers: Get rid of the float register width parameter. | Gabe Black | |
2009-07-08 | Registers: Add an ISA object which replaces the MiscRegFile. | Gabe Black | |
This object encapsulates (or will eventually) the identity and characteristics of the ISA in the CPU. | |||
2009-07-08 | ARM: Use custom read/write code to alias R15 with the PC. | Gabe Black | |
2009-07-08 | ISA parser: Allow alternative read/write code for operands. | Gabe Black | |
2009-07-08 | ARM: Move the remaining microops out of the decoder and into the ISA desc. | Gabe Black | |
2009-07-08 | ARM: Move the memory microops out of the decoder and into the ISA desc. | Gabe Black | |