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AgeCommit message (Expand)Author
2018-05-31mem-cache: Fix RandomReplDataDaniel R. Carvalho
2018-05-30gpu-compute: use X86ISA::TlbEntry over GpuTlbEntryBrandon Potter
2018-05-30dev: Exit correctly in dist-gem5 for SE modeMichael LeBeane
2018-05-30mem-cache: Determine if an MSHR has requests from another cacheNikos Nikoleris
2018-05-29arch-arm: ISA param for treating MISCREG_IMPDEF_UNIMPL as NOPGiacomo Travaglini
2018-05-29arch-arm: Remove unusued MISCREG_A64_UNIMPLGiacomo Travaglini
2018-05-29arch-arm: MPIDR.MT = 1 in a multithreaded systemGiacomo Travaglini
2018-05-29arch-arm: S3_<op1>_<Cn>_<Cm>_<op2> are Implementation definedGiacomo Travaglini
2018-05-29cpu: Avoid unnecessary dynamic_pointer_cast in atomic modelGiacomo Travaglini
2018-05-29arch-arm: Implement ARMv8.1 TTBR1_EL2 registerGiacomo Travaglini
2018-05-29arch-arm: Add E2H bit to HCR_EL2 System registerGiacomo Travaglini
2018-05-24x86: Add op classes to the MediaOps.Gabe Black
2018-05-18mem: Add support for more flexible DRAM timing and topologiesWendy Elsasser
2018-05-18mem: Optimize self-refresh entryWendy Elsasser
2018-05-17mem-cache: Move reference count stats update to blk invalidationNikos Nikoleris
2018-05-17mem-cache: Remove isTouched field from the CacheBlkNikos Nikoleris
2018-05-17mem-cache: Move replacements stat to the base cache classNikos Nikoleris
2018-05-17base: Add M5 flag for [[nodiscard]] attributeNikos Nikoleris
2018-05-17mem-cache: Simplify writeback for the tempBlock in recvTimingRespNikos Nikoleris
2018-05-16arch-arm: Fix semihosting arg count for SYS_GET_CMDLINEAndreas Sandberg
2018-05-16arch-arm: Add support for semihosting STDIO redirectionAndreas Sandberg
2018-05-16style: fix amd license and style issuesTony Gutierrez
2018-05-15gpu-compute: Cleanup the scheduler a bitTony Gutierrez
2018-05-12arch-riscv: Update CSR implementationsAlec Roelke
2018-05-09sim: Remove trailing dot when assigning a master's nameGiacomo Travaglini
2018-05-09base, dev: Fix port message for vnc and terminalAndreas Sandberg
2018-05-08arch-x86, arch-power: fix calls to bits and insertBitsMatt Sinclair
2018-05-08mem-cache: Create block insertion functionDaniel R. Carvalho
2018-05-08arch-arm: Map ID_x_EL1 registers to AArch32 versionGiacomo Travaglini
2018-05-08dev: Add support for a simple debug UARTAndreas Sandberg
2018-05-03mem-ruby: Consistent dprintf formats for issue outcomesBrad Beckmann
2018-05-03arch-x86: Enable fstatfs for x86_64Tony Gutierrez
2018-05-03mem-cache: Create Second-Chance replacement policyDaniel R. Carvalho
2018-05-03mem-cache: ReplacementPolicy specific replacement dataDaniel R. Carvalho
2018-05-02arch-x86: implement movntps/movntpd SSE instsSteve Reinhardt
2018-05-02x86: Add a ld/st microop flag for marking an access uncacheable.Gabe Black
2018-05-02arch-x86: Enable the umask system callTony Gutierrez
2018-04-27sim,cpu,mem,arch: Introduced MasterInfo data structureGiacomo Travaglini
2018-04-26mem-cache: Use block iteration in BaseSetAssocDaniel R. Carvalho
2018-04-20docs: Fix power model doxygenJason Lowe-Power
2018-04-19mem-cache: Use findBlock in FALRU's block accessDaniel R. Carvalho
2018-04-19mem-cache: Use secure flag in FALRU's findBlockDaniel R. Carvalho
2018-04-19arch-arm: Add ARMv8.1 TTBR1_EL2 registerGiacomo Travaglini
2018-04-19arch-arm: Fix Unknown Instruction disassembleGiacomo Travaglini
2018-04-19arch-arm: Change disassemble when MSR to UNKNOWN registerGiacomo Travaglini
2018-04-18mem-cache: Create NRU Replacement PolicyDaniel R. Carvalho
2018-04-18arch-arm: Fix masking in CPACR_EL1Chuan Zhu
2018-04-18arch-arm: Mask out unsupported trapped exception handling bitsChuan Zhu
2018-04-18arch-arm: Fix FPEXC32_EL2 to FPEXC mappingChuan Zhu
2018-04-18arch-arm: Adding MiscReg Priv (EL1) global flagGiacomo Travaglini
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