Age | Commit message (Expand) | Author |
2016-06-02 | arm: Rewrite ERET to behave according to the ARMv8 ARM | Andreas Sandberg |
2016-06-02 | arm: Correctly check FP/SIMD access permission in aarch32 | Andreas Sandberg |
2016-05-31 | arm: Enable LPAE support by default | Andreas Sandberg |
2016-05-31 | arm: Correctly check translation mode (aarch64/aarch32) | Andreas Sandberg |
2016-05-30 | scons: Bump minimum gcc version to 4.8 | Andreas Hansson |
2016-05-27 | cpu: fix lastStopped unserialisation | Ilias Vougioukas |
2016-05-27 | power: Allow voltage to be configured via cmd line | Akash Bagdia |
2016-05-27 | arm: Use the target EL state when determining fault format | Andreas Sandberg |
2016-05-26 | arm: Fix incorrect TLB permission check in aarch32 | Andreas Sandberg |
2016-05-26 | arm: Make EL checks available in SE mode | Andreas Sandberg |
2016-05-26 | mem: Fix memory leak in handling of deferred snoops | Andreas Hansson |
2016-05-26 | dev, arm: Add a flag to enable/disable gem5 GIC extensions | Andreas Sandberg |
2016-05-26 | cpu: Add a basic progress check to the TrafficGen | Andreas Hansson |
2016-05-26 | mem: Do not set cacheResponding on MSHR snoop if not responding | Andreas Hansson |
2016-05-26 | mem: Fix MemChecker unique_ptr type mismatch | Andreas Hansson |
2016-05-26 | arm: Fix heap overflow issue in Neon64Load operation | Andreas Hansson |
2016-05-26 | arm, dev: Remove superfluous loop increment in flash device | Andreas Hansson |
2016-05-26 | mem: fix headers include order in the cache related classes | Nikos Nikoleris |
2016-05-26 | mem: remove redudant check whether the cache forwards snoops | Nikos Nikoleris |
2016-05-26 | mem: change NULL to nullptr in the cache related classes | Nikos Nikoleris |
2016-05-26 | mem: fix the line length in the cache related classes | Nikos Nikoleris |
2016-05-19 | config, x86: Properly space pad the X86IntelMPBus Entry descriptions | Bjoern A. Zeeb |
2016-05-19 | arm,dev: PL011 UART_FR read status enhancement | Bjoern A. Zeeb |
2016-05-19 | x86, dev: properly space the APIC registers | Bjoern A. Zeeb |
2016-05-19 | dev, virtio: properly set PCI address space to use IOREG | Bjoern A. Zeeb |
2016-05-16 | gpu-compute: fix bug in GPUDynInst::isScalarRegister() | Tony Gutierrez |
2016-05-06 | gpu-compute: fix spacing in GPUDynInst ctor | Tony Gutierrez |
2016-05-06 | gpu-compute: fix uninitialized member bug in GPUDynInst | Tony Gutierrez |
2016-05-06 | dev, arm: Update GIC to use GICv2 register naming | Andreas Sandberg |
2016-04-27 | arm: Remove BreakPCEvent on guest kernel panic | Andreas Sandberg |
2016-04-27 | kvm, arm: Make GIC interrupt lines configurable | Andreas Sandberg |
2016-04-27 | kvm, arm: Refactor KVM GIC device | Andreas Sandberg |
2016-04-27 | dev: Fix incorrect terminal backlog handling | Andreas Sandberg |
2016-04-26 | ruby: Rename pkt to m_pkt so it may be accessed via SLICC | Matthew Poremba |
2016-04-21 | mem: Include WriteLineReq in cache demand stats | Andreas Hansson |
2016-04-21 | mem: Remove unused cache stats | Andreas Hansson |
2016-04-21 | mem: Deallocate all write-queue entries when sent | Andreas Hansson |
2016-04-21 | mem: Align downstream cache packet creation in atomic and timing | Andreas Hansson |
2016-04-15 | ruby: Fix block_on behavior | Joel Hestness |
2016-04-15 | arm,dev: remove PMU assertion hit on reset | Bjoern A. Zeeb |
2016-04-15 | mem: FreeBSD does not provide MAP_NORESERVE either | Bjoern A. Zeeb |
2016-04-13 | misc: Fix issues flagged by gcc 6 | Andreas Hansson |
2016-04-12 | misc: Appease clang...again | Andreas Hansson |
2016-04-07 | mem: Add priority to QueuedPrefetcher | Rekai Gonzalez Alberquilla |
2016-04-07 | mem: Handful extra features for BasePrefetcher | Rekai Gonzalez Alberquilla |
2016-04-07 | mem: Add Program Counter to MemTraceProbe | Victor Garcia |
2015-05-27 | mem: Add unused prefetch counter in caches | Rekai Gonzalez Alberquilla |
2016-04-07 | mem: Remove threadId from memory request class | Mitch Hayenga |
2016-04-05 | cpu: Implement per-thread GHRs | Mitch Hayenga |
2016-04-05 | cpu: Add an indirect branch target predictor | Mitch Hayenga |