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AgeCommit message (Expand)Author
2007-04-04Reworking how x86's isa description works. I'm adopting the following definit...Gabe Black
2007-04-04Make "Name" really be the same as "name" with only the first letter capitaliz...Gabe Black
2007-04-04Made x86 ExtMachInsts distinguishable from each other by defining a real == a...Gabe Black
2007-04-04Added all the different variations of the register names.Gabe Black
2007-04-03Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2007-04-03A batch of changes and fixes. Macroops are now generated automatically, multi...Gabe Black
2007-04-03Zero out ModRM if the byte isn't there, and fix some displacement size stuff.Gabe Black
2007-04-02Remove/comment out DPRINTFs that were causing a segfault.Kevin Lim
2007-04-02Fix up SPARC's CPU builder to match changes to Alpha's CPU builder.Kevin Lim
2007-03-29Merge zizzer:/bk/newmemAli Saidi
2007-03-29make serialization at least seem to workAli Saidi
2007-03-29get rid of CWP bounds warning...Ali Saidi
2007-03-29Made the MultiOp format do a little more. It now sets up single microop instr...Gabe Black
2007-03-29Add a microcode assembler. A microcode "program" is a series of statements. E...Gabe Black
2007-03-29Override addPrivateSplitL1Caches function in order to automatically set the t...Kevin Lim
2007-03-29Update code so that the O3 CPU can handle not initially having anything hooke...Kevin Lim
2007-03-29Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2007-03-29Fidget with the syntax of the MultiOp format in anticipation of making it act...Gabe Black
2007-03-29Add code to generate register and immediate based integer op microop classes.Gabe Black
2007-03-29Allow "let" blocks to add code to the output files.Gabe Black
2007-03-28Call compare and Swap on the target, not the response.Ron Dreslinski
2007-03-27some more fixes... non-tso stuff seems to workAli Saidi
2007-03-27Merge zizzer:/bk/newmemRon Dreslinski
2007-03-27First Pass At Cmp/Swap in cachesRon Dreslinski
2007-03-26Instead of creating a new python process to run traceflags.py,Nathan Binkert
2007-03-26Merge zizzer:/bk/newmemAli Saidi
2007-03-26first bit of life from the intel gigabit modelAli Saidi
2007-03-24Update for new trace data behavior.Kevin Lim
2007-03-24Merge ktlim@zizzer:/bk/newmemKevin Lim
2007-03-23Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2007-03-23Merge ktlim@zizzer:/bk/newmemKevin Lim
2007-03-23Make hardware loads/stores serializing; they need to avoid certain out-of-ord...Kevin Lim
2007-03-23Updates for commit.Kevin Lim
2007-03-233 memory system fixes:Kevin Lim
2007-03-23Handle status bits a little better, as well as non-speculative instructions.Kevin Lim
2007-03-23Two fixes:Kevin Lim
2007-03-23Set progress_interval in terms of CPU cycles.Kevin Lim
2007-03-23A couple of minor fixes.Kevin Lim
2007-03-22Merge zizzer:/bk/newmemAli Saidi
2007-03-22finish up the coding of the Intel Gb NIC... Many Many bugs to squashAli Saidi
2007-03-22Add structure based bitfield syntax to the isa_parser. This is primarily usef...Gabe Black
2007-03-22Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2007-03-21Add a junk operand. With no operands, the parser breaks.Gabe Black
2007-03-21Start implementing groups of instructions which do the same thing on differen...Gabe Black
2007-03-21put the int register count in intregs.hhGabe Black
2007-03-21Break out the one and two byte opcodes into different files. Also change what...Gabe Black
2007-03-21Missed a constGabe Black
2007-03-21Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2007-03-21The m5 side of statetrace. This is fairly ugly, but I don't want to lose it.Gabe Black
2007-03-20Ignore "time" and "times" syscalls.Gabe Black
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