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AgeCommit message (Expand)Author
2010-10-01Debug: Implement getArgument() and function skipping for ARM.Ali Saidi
2010-10-01ARM: Clean up use of TBit and JBit.Ali Saidi
2010-09-30CPU/Cache: Fix some errors exposed by valgrindAli Saidi
2010-09-29X86: Fix the RIP relative versions of the BT, BTC, BTR, and BTS instructions.Gabe Black
2010-09-22python: get rid of internal.enums package.Steve Reinhardt
2010-09-21cache: improve coherence handling of writebacksSteve Reinhardt
2010-09-20CPU: Fix O3 and possible InOrder segfaults in FS.Gabe Black
2010-09-16devices: undo cset 017baf09599f that added timer drain functions.Steve Reinhardt
2010-09-14X86: Make the halt microop non-speculative.Gabe Black
2010-09-14X86: Make unrecognized instructions behave better in x86.Gabe Black
2010-09-14CPU: Trim unnecessary includes from some common files.Gabe Black
2010-09-13CPU: Get rid of the now unnecessary getInst/setInst family of functions.Gabe Black
2010-09-13Faults: Pass the StaticInst involved, if any, to a Fault's invoke method.Gabe Black
2010-09-12swig: make all generated files go into the m5.internal packageNathan Binkert
2010-09-10style: fix sorting of includes and whitespace in some filesNathan Binkert
2010-09-09scons: Stop building the big monolithic swigged params moduleNathan Binkert
2010-09-09init: don't build files that centralize python and swig codeNathan Binkert
2010-09-09scons: use code_formatter wherever we can in the build systemNathan Binkert
2010-09-09code_formatter: make it easier to insert whitespaceNathan Binkert
2010-09-09swig: don't override SWIG_name anymoreNathan Binkert
2010-09-09cache: fail SC when invalidated while waiting for busSteve Reinhardt
2010-09-09mem: fix functional accesses to deal with coherence changeSteve Reinhardt
2010-09-09cache: coherence protocol enhancements & bug fixesSteve Reinhardt
2010-08-31ARM: Get rid of the checkFpEnableFault function in ARM.Gabe Black
2010-08-31Alpha: Alpha's mt.hh was including mips header files.Gabe Black
2010-08-31CPU: Get rid of the unused ev5_trap function on the simple and checker CPUs.Gabe Black
2010-08-27X86: Change the copyright holder to AMD.Gabe Black
2010-08-26mem: fix m5.fast compile bug in previous csetSteve Reinhardt
2010-08-25cache: fix a bug in atomic multilevel snoopsSteve Reinhardt
2010-08-25memtest: fix/cleanup functional access testingSteve Reinhardt
2010-08-25CPU: Print out traces for faluting inst when the flag ExecFaulting is setAli Saidi
2010-08-25ARM: Support unaligned memory access.Min Kyu Jeong
2010-08-25ARM: Seperate the queues of L1 and L2 walker states.Gene WU
2010-08-25ARM: Adding a bogus fault that does nothing.Min Kyu Jeong
2010-08-25ARM: Remove ALPHA KSeg functions.William Wang
2010-08-25ARM: Limited implementation of dprintk.Ali Saidi
2010-08-25ARM: Fixed register flattening logic (FP_Base_DepTag was set too low)Min Kyu Jeong
2010-08-25ARM: Make VMSR, RFE PC/LR etc non speculative, and serializingAli Saidi
2010-08-25ARM: Use fewer micro-ops for register update loads if possible.Gene WU
2010-08-25ARM: Set the high bits in the part number so it's considered new by some code.Ali Saidi
2010-08-25ARM: Fix VFP enabled checks for mem instructionsAli Saidi
2010-08-25ARM: Seperate out the renamable bits in the FPSCR.Gabe Black
2010-08-25ARM: Eliminate some unused enums.Gabe Black
2010-08-25ARM: Fix type comparison warnings in Neon.Gabe Black
2010-08-25ARM: Implement CPACR register and return Undefined Instruction when FP access...Gabe Black
2010-08-25ARM: Implement all ARM SIMD instructions.Gabe Black
2010-08-25ARM: Expand the mode checking utility functions.Gabe Black
2010-08-25Tracing: Fix trace so 'Predicated False' doesn't show upAli Saidi
2010-08-25mem: fix dumb typo in copyrightsSteve Reinhardt
2010-08-24testers: move testers to a new directoryBrad Beckmann