Age | Commit message (Collapse) | Author |
|
--HG--
extra : convert_revision : 0956b3d3532cba3856deda914d7cc708377b701b
|
|
--HG--
extra : convert_revision : 54a6b36dff3c15699faf2c767fc594359422c0ee
|
|
--HG--
extra : convert_revision : 58448b984447babba708b9dcb1b4939ed35308a6
|
|
--HG--
extra : convert_revision : 388c0d6f2af96c4d33c1fe5d42a21866a4d71556
|
|
src/arch/x86/isa/formats/multi.isa:
Make the formats use objects to pass around output code.
--HG--
extra : convert_revision : 428915bda22e848befac15097f56375c1818426e
|
|
--HG--
extra : convert_revision : f8907ef5ef77e050eeb00d895263b49da4a9b6e9
|
|
--HG--
extra : convert_revision : 7e9a1feb808604364584893eed1735a8da1556fb
|
|
src/arch/x86/isa/macroop.isa:
Make microOp vs microop and macroOp vs macroop capitilization consistent. Also fill out the emulation environment handling a little more, and use an object to pass around output code.
src/arch/x86/isa/microops/base.isa:
Make microOp vs microop and macroOp vs macroop capitilization consistent. Also adjust python to C++ bool translation.
--HG--
extra : convert_revision : 6f4bacfa334c42732c845f9a7f211cbefc73f96f
|
|
--HG--
extra : convert_revision : 55f89d9f96734e96ae082399df6b0206d112cd6c
|
|
--HG--
extra : convert_revision : 9b79ce72acf8932ce26e1744a149f2fd2435ea96
|
|
--HG--
extra : convert_revision : 58d37d8cc8e41c9640038d6dddae4cb5649638aa
|
|
--HG--
extra : convert_revision : 89636a7410dec54235416e3c16db98cc5eecf2b0
|
|
src/arch/x86/isa/main.isa:
Clean up where files are included.
--HG--
extra : convert_revision : 0528359432bf0fb9198b63de9611176bc78e07c7
|
|
--HG--
extra : convert_revision : 62ad0839847db85738054da6f7da8a956b24143e
|
|
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : 4a2f2884a9d1125dc3156e080931ddc40defcfc7
|
|
Also, the code is now a single string which runs through the microcode assembler rather than docstrings associated with classes named after each architectural level instruction.
--HG--
extra : convert_revision : 20e6d6ac625dde8f1885acc445882096df562778
|
|
--HG--
extra : convert_revision : 7d1a43c5791a2e7e30533746da3dd7036a5b8799
|
|
--HG--
extra : convert_revision : d64fe734fcdcc414ba9af9fc5f0f795429d5dad3
|
|
--HG--
extra : convert_revision : 1854ebc00a9f3ae8c36cc579de6c3a2b48c0fdb6
|
|
into zizzer.eecs.umich.edu:/tmp/newmem
--HG--
extra : convert_revision : e0721f59cce9cb356b53977e21bd4a7c779c217d
|
|
Makes page table cache scheme actually work
src/mem/page_table.cc:
src/mem/page_table.hh:
fix caching scheme to actually work and improve performance
--HG--
extra : convert_revision : 443a8d8acbee540b26affcfdfbf107b8e735d1bd
|
|
--HG--
extra : convert_revision : f4883febd92cfade61c1a6a31fdb2d27296d9044
|
|
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : 77222b85492c8ad6c0b776fa34c83065c77c402e
|
|
--HG--
extra : convert_revision : 8ee88bff8010dcb7a412f6a6b49d40fad1c0bb68
|
|
doesn't compile.
src/arch/x86/isa/decoder/one_byte_opcodes.isa:
src/arch/x86/isa/macroop.isa:
src/arch/x86/isa/main.isa:
src/arch/x86/isa/microasm.isa:
src/arch/x86/isa/microops/base.isa:
src/arch/x86/isa/microops/microops.isa:
src/arch/x86/isa/operands.isa:
src/arch/x86/isa/microops/regop.isa:
src/arch/x86/isa/microops/specop.isa:
Reworking x86's microcode system
--HG--
extra : convert_revision : cab66be59ed758b192226af17eddd5a86aa190f3
|
|
bit in the ExtMachInst.
--HG--
extra : convert_revision : 87dc6e6b2281b6a11a0c0e8320b7f4acc29f6fb8
|
|
--HG--
extra : convert_revision : 8ceb816c17108d7cb65cb46d8dc2bd2753b0e0f0
|
|
into zeep.pool:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : 43dc3a23758e7956572d59464ebddcc56e82728b
|
|
into zeep.pool:/z/saidi/work/m5.newmem
src/cpu/simple/base.cc:
hand merge vincent/gabe/my changes to cast sizeof() to a 64bit int
--HG--
extra : convert_revision : eb989b4d65d08057df1777c04b8ee2cfa75a2695
|
|
--HG--
extra : convert_revision : 1ae34a069bbd997a8f888f69415fbeaaf4ade0b3
|
|
--HG--
extra : convert_revision : 3953ace8d481d758d6e0d89183c0a7e7bebcf681
|
|
--HG--
extra : convert_revision : 72ffcf5492d4e4f899ea5761639147e001c525b0
|
|
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : de6db1dbe0db519e75d723c7221a60f54b713f8f
|
|
--HG--
extra : convert_revision : 40a636a539e84decfca438c07adf022eed7b7780
|
|
--HG--
extra : convert_revision : a69c09c5e62c8b00d6c8039199c02e8fecbf9f2f
|
|
floor
--HG--
extra : convert_revision : 964391c8050af0239da32bcc77550740de1f3160
|
|
--HG--
extra : convert_revision : 3a14c683ab89217c083c58e8c374607dd04b66c4
|
|
--HG--
extra : convert_revision : fbc93ba592b0cc009696e8d7edead841ec2ea01c
|
|
--HG--
extra : convert_revision : 3f93baaf250922eb40d8718e978273b0def1e4dd
|
|
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
src/cpu/simple/base.cc:
Hand merge
--HG--
extra : convert_revision : a2902ef9d917d22ffb9c7dfa2fd444694a65240d
|
|
into zamp.eecs.umich.edu:/.automount/greenville/w/acolyte/newmem
--HG--
extra : convert_revision : c80b7ef5a2cc4ab1b86bb1eef7fae91886a7737d
|
|
Initialize a temporary variable for thread->readPC() at setupFetchRequest() to reduce function calls.
exec tracing isn't needed for m5.fast binaries
Moved MISCREG_GL, MISCREG_CWP, and MISCREG_TLB_DATA out of switch statement and use if blocks instead.
src/arch/sparc/miscregfile.cc:
Moved MISCREG_GL, MISCREG_CWP, and MISCREG_TLB_DATA out of switch statement and use if blocks instead.
src/cpu/simple/base.cc:
Assign traceData to be NULL at BaseSimpleCPU constructor.
Initialize a temporary variable for thread->readPC() at setupFetchRequest() to reduce function calls.
exec tracing isn't needed for m5.fast binaries
--HG--
extra : convert_revision : 5dc92fff05c9bde994f1e0f1bb40e11c44eb72c6
|
|
src/arch/micro_asm.py:
Micro assembler
src/arch/micro_asm_test.py:
Test script for the micro assembler. This probably should go somewhere else eventually.
--HG--
extra : convert_revision : 277fdadec94763ae657f55f501704693b81e0015
|
|
src/arch/x86/isa/decoder/one_byte_opcodes.isa:
Give the "MOV" instruction the format of it's arguments. This will likely need to be completely overhauled in the near future.
src/arch/x86/predecoder.cc:
src/arch/x86/predecoder.hh:
Make the predecoder explicitly reset itself rather than counting on it happening naturally.
src/arch/x86/predecoder_tables.cc:
Fix the immediate size table
src/arch/x86/regfile.cc:
nextnpc is bogus
--HG--
extra : convert_revision : 0926701fedaab41817e64bb05410a25174484a5a
|
|
--HG--
extra : convert_revision : a6194cc9c3b2eb83dc8480ed0417b2246f07b4bd
|
|
Oops... forgot to update call site after changing
function argument semantics.
src/mem/tport.cc:
Oops... forgot to update call site after changing
function argument semantics.
--HG--
extra : convert_revision : 9234b991dc678f062d268ace73c71b3d13dd17dc
|
|
Make it a better base class for cache ports.
--HG--
extra : convert_revision : 37d6de11545a68c1a7d11ce33fe5971c51434ee4
|
|
- factor out checkFunctional() code so it can be
called from derived classes
- use EventWrapper for sendEvent, move event handling
code from event to port where it belongs
- make sendEvent a pointer so derived classes can
override it
- replace std::pair with new class for readability
--HG--
extra : convert_revision : 5709de2daacfb751a440144ecaab5f9fc02e6b7a
|
|
--HG--
extra : convert_revision : 24c00ec4904d9fb4d6e39521e0ff8b8f60d60f6a
|
|
--HG--
extra : convert_revision : bccafe884e58a55b02ff408448e6644196e439a4
|