summaryrefslogtreecommitdiff
path: root/src
AgeCommit message (Collapse)Author
2010-06-16cache: fail store conditionals when upgrade loses raceSteve Reinhardt
Requires new "SCUpgradeReq" message that marks upgrades for store conditionals, so downstream caches can fail these when they run into invalidations. See http://www.m5sim.org/flyspray/task/197
2010-06-16cache: fix dirty bit settingSteve Reinhardt
Only set the dirty bit when we actually write to a block (not if we thought we might but didn't, as in a failed SC or CAS). This requires makeing sure the dirty bit stays set when we get an exclusive (writable) copy in a cache-to-cache transfer from another owner, which n turn requires copying the mem-inhibit flag from timing-mode requests to their associated responses.
2010-06-15stats: rename print to display in the mysql code too...sorryNathan Binkert
2010-06-15stats: rename print to display so it work in pythonNathan Binkert
2010-06-15stats: only consider a formula initialized if there is a formulaNathan Binkert
2010-06-14stats: get rid of the never-really-used event stuffNathan Binkert
2010-06-14util: clean up attrdict and import multiattrdict into m5.utilNathan Binkert
2010-06-14python: use ipython in --interactive if it is availableNathan Binkert
2010-06-10ruby: get rid of PrioHeap and use STLNathan Binkert
One big difference is that PrioHeap puts the smallest element at the top of the heap, whereas stl puts the largest element on top, so I changed all comparisons so they did the right thing. Some usage of PrioHeap was simply changed to a std::vector, using sort at the right time, other usage had me just use the various heap functions in the stl.
2010-06-10ruby: get rid of the Map classNathan Binkert
2010-06-10ruby: get rid of Vector and use STLNathan Binkert
add a couple of helper functions to base for deleteing all pointers in a container and outputting containers to a stream
2010-06-10ruby: get rid of RefCnt and Allocator stuff use base/refcnt.hhNathan Binkert
This was somewhat tricky because the RefCnt API was somewhat odd. The biggest confusion was that the the RefCnt object's constructor that took a TYPE& cloned the object. I created an explicit virtual clone() function for things that took advantage of this version of the constructor. I was conservative and used clone() when I was in doubt of whether or not it was necessary. I still think that there are probably too many instances of clone(), but hopefully not too many. I converted several instances of const MsgPtr & to a simple MsgPtr. If the function wants to avoid the overhead of creating another reference, then it should just use a regular pointer instead of a ref counting ptr. There were a couple of instances where refcounted objects were created on the stack. This seems pretty dangerous since if you ever accidentally make a reference to that object with a ref counting pointer, bad things are bound to happen.
2010-06-09flags: add comment to avoid future deletions since code appears redundant.Lisa Hsu
2010-06-08flags: Unserializing old checkpoints before the introductionLisa Hsu
of the Initialized flag would break, set Initialized for events upon unserialization.
2010-06-07scons: make RUBY a regular (non-global) sticky varSteve Reinhardt
and force it to True for builds that imply Ruby protocols (else unexpected things happen when testing these builds with RUBY=False).
2010-06-03More minor gdb-related cleanup.Steve Reinhardt
Found several more stale includes and forward decls.
2010-06-03Act like enabling CPUs is no big deal,Steve Reinhardt
rather than a scary thing that might not work.
2010-06-03Minor remote GDB cleanup.Steve Reinhardt
Expand the help text on the --remote-gdb-port option so people know you can use it to disable remote gdb without reading the source code, and thus don't waste any time trying to add a separate option to do that. Clean up some gdb-related cruft I found while looking for where one would add a gdb disable option, before I found the comment that told me that I didn't need to do that.
2010-06-03Stats: fix dist stat and enable VectorDistStatLisa Hsu
2010-06-03ARM: Fix issue with m5.fast and ARMAli Saidi
2010-06-02ARM: Fix SPEC2000 benchmarks in SE mode. With this patch allAli Saidi
Spec2k benchmarks seem to run with atomic or timing mode simple CPUs. Fixed up some constants, handling of 64 bit arguments, and marked a few more syscalls ignoreFunc.
2010-06-02ARM: Fix IT state not updating when an instruction memory instruction faults.Min Kyu Jeong
2010-06-02ARM: Allow multiple outstanding TLB walks to queue.Dam Sunwoo
2010-06-02ARM TLB: Fix bug in memAttrs getting a bogus thread contextAli Saidi
2010-06-02ARM: Support table walks in timing mode.Dam Sunwoo
2010-06-02ARM: Added support for Access Flag and some CP15 regs (V2PCWPR, V2PCWPW, ↵Dam Sunwoo
V2PCWUR, V2PCWUW,...)
2010-06-02ARM: Decode the neon instruction space.Gabe Black
2010-06-02ARM: Add a comment to vfp.cc that explains the asm statements.Gabe Black
2010-06-02ARM: Move some case values out of ##included files.Gabe Black
This will help keep the high level decode together and not have it spread into the subordinate decode stuff. The ##include lines still need to be on a line by themselves, though.
2010-06-02ARM: Combine some redundant cases in one of the data decode functions.Gabe Black
2010-06-02ARM: Add comments to the classes in macromem.hh.Gabe Black
2010-06-02ARM: Move code from vfp.hh to vfp.cc.Gabe Black
2010-06-02ARM: Make some of the trace code more compactAli Saidi
2010-06-02ARM: Move the longer MemoryReg::printoffset function in mem.hh into the cc file.Gabe Black
2010-06-02ARM: Move the ISA "clear" function into isa.cc.Gabe Black
2010-06-02ARM: Get rid of the binary dumping function in utility.hh.Gabe Black
2010-06-02ARM: Get rid of the empty branch.cc.Gabe Black
2010-06-02ARM: Mark some ARM static inst functions as inline.Gabe Black
2010-06-02ARM: Move some predecoder stuff into a .cc file.Gabe Black
--HG-- rename : src/arch/arm/predecoder.hh => src/arch/arm/predecoder.cc
2010-06-02ARM: Decode to specialized conditional/unconditional versions of instructions.Gabe Black
This is to avoid condition code based dependences from effectively serializing instructions when the instruction doesn't actually use them.
2010-06-02ARM: Make sure undefined unconditional ARM instructions decode as such.Gabe Black
2010-06-02ARM: Implement a version of mcr and mrc that works in user mode.Gabe Black
2010-06-02ARM: Hook the misc instructions into the thumb decoder.Gabe Black
2010-06-02ARM: Move some miscellaneous instructions out of the decoder to share with ↵Gabe Black
thumb.
2010-06-02ARM: Treat LDRD in ARM with an odd index as an undefined instruction.Gabe Black
2010-06-02ARM: fix sizes of structs for ARM LinuxAli Saidi
2010-06-02ARM: Fixup native trace support and add some v7/recent stack codeAli Saidi
2010-06-02ARM: Detect a bad offset field for the VFP Ldm/Stm instructions in the decoder.Gabe Black
2010-06-02ARM: Make sure the upc is zeroed when vectoring to a fault.Gabe Black
2010-06-02ARM: Implement the getrusage syscall.Ali Saidi