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2010-06-02ARM: Actually write the value of sctlr in ISA.clear().Gabe Black
2010-06-02ARM: Replace the ARM decode of CP15 MCR and MRC instructions.Gabe Black
2010-06-02ARM: Decode the unimplemented cp15 instruction barrier.Gabe Black
2010-06-02ARM: Ignore accesses to DCCIMVAC.Gabe Black
2010-06-02ARM: Allow accesses to the software thread id registers.Gabe Black
2010-06-02ARM: Allow accesses to the contextidr register.Gabe Black
2010-06-02ARM: Warn about and ignore accesses to DCCISW.Gabe Black
This register is supposed to "Clean and invalidate data or unified cache line by set/way." Since there isn't a good way to do that, we'll just ignore these and warn about it.
2010-06-02ARM: Decode the thumb versions of the mcr and mrc instructions.Gabe Black
2010-06-02ARM: Implement the mrc and mcr instructions.Gabe Black
2010-06-02ARM: Rename the RevOp base class to something more generic.Gabe Black
2010-06-02ARM: Add a version of the Dest and Op1 operands for accessing the MiscRegs.Gabe Black
2010-06-02ARM: Implement a function to decode CP15 registers to MiscReg indices.Gabe Black
2010-06-02ARM: Decode the bfi and bfc instructions.Gabe Black
2010-06-02ARM: Implement the bfc and bfi instructions.Gabe Black
2010-06-02ARM: Decode the ubfx and sbfx instructions.Gabe Black
2010-06-02ARM: Decode miscellaneous arm mode media instructions.Gabe Black
2010-06-02ARM: Implement the ubfx and sbfx instructions.Gabe Black
2010-06-02ARM: Add a register, immediate, immediate to register base for [su]bfx.Gabe Black
2010-06-02ARM: Decode the clz instruction.Gabe Black
2010-06-02ARM: Implement the clz instruction.Gabe Black
2010-06-02ARM: Decode the rbit instruction.Gabe Black
2010-06-02ARM: Implement the rbit instruction.Gabe Black
2010-06-02ARM: Decode the nop instruction.Gabe Black
2010-06-02ARM: Implement nop.Gabe Black
2010-06-02ARM: Decode the ldrex instruction.Gabe Black
2010-06-02ARM: Rearrange the load/store double/exclusive, table branch thumb decoding.Gabe Black
2010-06-02ARM: Implement the ldrex instruction.Gabe Black
2010-06-02ARM: Decode the usad8 and usada8 instructions.Gabe Black
2010-06-02ARM: Implement the usad8 and usada8 instructions.Gabe Black
2010-06-02ARM: Add a base class to support usada8.Gabe Black
2010-06-02ARM: Decode the sel instruction.Gabe Black
2010-06-02ARM: Implement the sel instruction.Gabe Black
2010-06-02ARM: Add a base class for the sel instruction.Gabe Black
2010-06-02ARM: Decode pkh instructions.Gabe Black
2010-06-02ARM: Implement the pkh instruction.Gabe Black
2010-06-02ARM: Decode the sign/zero extend instructions.Gabe Black
2010-06-02ARM: Implement zero/sign extend instructions.Gabe Black
2010-06-02ARM: Add a base class for extend and add instructions.Gabe Black
2010-06-02ARM: Generalize the saturation instruction bases for use in other instructions.Gabe Black
2010-06-02ARM: Decode the 8/16 bit signed/unsigned add/subtract half instructions.Gabe Black
2010-06-02ARM: Implement the 8/16 bit signed/unsigned add/subtract half instructions.Gabe Black
2010-06-02ARM: Fix signed most significant multiply instructions.Gabe Black
2010-06-02ARM: Fix multiply overflow flag setting.Gabe Black
2010-06-02ARM: Decode the saturation instructions.Gabe Black
2010-06-02ARM: Implement the saturation instructions.Gabe Black
2010-06-02ARM: Implement base classes for the saturation instructions.Gabe Black
2010-06-02ARM: Decode the signed add/subtract and subtract/add instructions.Gabe Black
2010-06-02ARM: Implement signed add/subtract and subtract/add.Gabe Black
2010-06-02ARM: Decode the unsigned 8 and 16 bit add and subtract instructions.Gabe Black
2010-06-02ARM: Implement the unsigned 8 bit and 16 bit vector adds and subtracts.Gabe Black