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This microop does a store and unlocks the requested address. The RISC86
microop ISA doesn't seem to have an equivalent to this, so I'm guessing that
the store following an ldstl is automatically unlocking. We don't do it this
way for performance reasons since the behavior is the same.
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This microop does a load, checks that a store would succeed, and locks the
requested address.
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delivered.
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actually use it.
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don't assert.
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TLBS correcty in SE mode. The error was forwarding translations directly to pageTable. The TLB should check for alignment faults at bare minimum here but in the long run we should be using TLBs in SE mode for MIPS.
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flag on syscall instructions allowing O3 to handle SE mode syscalls incorrectly and speculate on instructions after a syscall
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stage was not setting the predicted PC correctly or passing that information back to fetch correctly
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Calculations
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For some reason o3 FS init() only called initCPU if the thread state
was Suspended, which was no longer the case. There's no apparent
reason to check, so I whacked the test completely rather than
changing the check to Halted.
The inorder init() was also updated to be symmetric, though the
previous code was just a fancy no-op.
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This situation can arise now on the first fetch cycle after
the last active thread is halted. It seems easy enough to
deal with when it happens rather than trying to avoid it.
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