Age | Commit message (Collapse) | Author |
|
--HG--
extra : convert_revision : 9b79ce72acf8932ce26e1744a149f2fd2435ea96
|
|
--HG--
extra : convert_revision : 58d37d8cc8e41c9640038d6dddae4cb5649638aa
|
|
--HG--
extra : convert_revision : 89636a7410dec54235416e3c16db98cc5eecf2b0
|
|
src/arch/x86/isa/main.isa:
Clean up where files are included.
--HG--
extra : convert_revision : 0528359432bf0fb9198b63de9611176bc78e07c7
|
|
--HG--
extra : convert_revision : 62ad0839847db85738054da6f7da8a956b24143e
|
|
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : 4a2f2884a9d1125dc3156e080931ddc40defcfc7
|
|
Also, the code is now a single string which runs through the microcode assembler rather than docstrings associated with classes named after each architectural level instruction.
--HG--
extra : convert_revision : 20e6d6ac625dde8f1885acc445882096df562778
|
|
--HG--
extra : convert_revision : 7d1a43c5791a2e7e30533746da3dd7036a5b8799
|
|
--HG--
extra : convert_revision : d64fe734fcdcc414ba9af9fc5f0f795429d5dad3
|
|
--HG--
extra : convert_revision : 1854ebc00a9f3ae8c36cc579de6c3a2b48c0fdb6
|
|
into zizzer.eecs.umich.edu:/tmp/newmem
--HG--
extra : convert_revision : e0721f59cce9cb356b53977e21bd4a7c779c217d
|
|
Makes page table cache scheme actually work
src/mem/page_table.cc:
src/mem/page_table.hh:
fix caching scheme to actually work and improve performance
--HG--
extra : convert_revision : 443a8d8acbee540b26affcfdfbf107b8e735d1bd
|
|
--HG--
extra : convert_revision : f4883febd92cfade61c1a6a31fdb2d27296d9044
|
|
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : 77222b85492c8ad6c0b776fa34c83065c77c402e
|
|
--HG--
extra : convert_revision : 8ee88bff8010dcb7a412f6a6b49d40fad1c0bb68
|
|
doesn't compile.
src/arch/x86/isa/decoder/one_byte_opcodes.isa:
src/arch/x86/isa/macroop.isa:
src/arch/x86/isa/main.isa:
src/arch/x86/isa/microasm.isa:
src/arch/x86/isa/microops/base.isa:
src/arch/x86/isa/microops/microops.isa:
src/arch/x86/isa/operands.isa:
src/arch/x86/isa/microops/regop.isa:
src/arch/x86/isa/microops/specop.isa:
Reworking x86's microcode system
--HG--
extra : convert_revision : cab66be59ed758b192226af17eddd5a86aa190f3
|
|
bit in the ExtMachInst.
--HG--
extra : convert_revision : 87dc6e6b2281b6a11a0c0e8320b7f4acc29f6fb8
|
|
--HG--
extra : convert_revision : 8ceb816c17108d7cb65cb46d8dc2bd2753b0e0f0
|
|
into zeep.pool:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : 43dc3a23758e7956572d59464ebddcc56e82728b
|
|
into zeep.pool:/z/saidi/work/m5.newmem
src/cpu/simple/base.cc:
hand merge vincent/gabe/my changes to cast sizeof() to a 64bit int
--HG--
extra : convert_revision : eb989b4d65d08057df1777c04b8ee2cfa75a2695
|
|
--HG--
extra : convert_revision : 1ae34a069bbd997a8f888f69415fbeaaf4ade0b3
|
|
--HG--
extra : convert_revision : 3953ace8d481d758d6e0d89183c0a7e7bebcf681
|
|
--HG--
extra : convert_revision : 72ffcf5492d4e4f899ea5761639147e001c525b0
|
|
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : de6db1dbe0db519e75d723c7221a60f54b713f8f
|
|
--HG--
extra : convert_revision : 40a636a539e84decfca438c07adf022eed7b7780
|
|
--HG--
extra : convert_revision : a69c09c5e62c8b00d6c8039199c02e8fecbf9f2f
|
|
floor
--HG--
extra : convert_revision : 964391c8050af0239da32bcc77550740de1f3160
|
|
--HG--
extra : convert_revision : 3a14c683ab89217c083c58e8c374607dd04b66c4
|
|
--HG--
extra : convert_revision : fbc93ba592b0cc009696e8d7edead841ec2ea01c
|
|
--HG--
extra : convert_revision : 3f93baaf250922eb40d8718e978273b0def1e4dd
|
|
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
src/cpu/simple/base.cc:
Hand merge
--HG--
extra : convert_revision : a2902ef9d917d22ffb9c7dfa2fd444694a65240d
|
|
into zamp.eecs.umich.edu:/.automount/greenville/w/acolyte/newmem
--HG--
extra : convert_revision : c80b7ef5a2cc4ab1b86bb1eef7fae91886a7737d
|
|
Initialize a temporary variable for thread->readPC() at setupFetchRequest() to reduce function calls.
exec tracing isn't needed for m5.fast binaries
Moved MISCREG_GL, MISCREG_CWP, and MISCREG_TLB_DATA out of switch statement and use if blocks instead.
src/arch/sparc/miscregfile.cc:
Moved MISCREG_GL, MISCREG_CWP, and MISCREG_TLB_DATA out of switch statement and use if blocks instead.
src/cpu/simple/base.cc:
Assign traceData to be NULL at BaseSimpleCPU constructor.
Initialize a temporary variable for thread->readPC() at setupFetchRequest() to reduce function calls.
exec tracing isn't needed for m5.fast binaries
--HG--
extra : convert_revision : 5dc92fff05c9bde994f1e0f1bb40e11c44eb72c6
|
|
src/arch/micro_asm.py:
Micro assembler
src/arch/micro_asm_test.py:
Test script for the micro assembler. This probably should go somewhere else eventually.
--HG--
extra : convert_revision : 277fdadec94763ae657f55f501704693b81e0015
|
|
src/arch/x86/isa/decoder/one_byte_opcodes.isa:
Give the "MOV" instruction the format of it's arguments. This will likely need to be completely overhauled in the near future.
src/arch/x86/predecoder.cc:
src/arch/x86/predecoder.hh:
Make the predecoder explicitly reset itself rather than counting on it happening naturally.
src/arch/x86/predecoder_tables.cc:
Fix the immediate size table
src/arch/x86/regfile.cc:
nextnpc is bogus
--HG--
extra : convert_revision : 0926701fedaab41817e64bb05410a25174484a5a
|
|
--HG--
extra : convert_revision : a6194cc9c3b2eb83dc8480ed0417b2246f07b4bd
|
|
Oops... forgot to update call site after changing
function argument semantics.
src/mem/tport.cc:
Oops... forgot to update call site after changing
function argument semantics.
--HG--
extra : convert_revision : 9234b991dc678f062d268ace73c71b3d13dd17dc
|
|
Make it a better base class for cache ports.
--HG--
extra : convert_revision : 37d6de11545a68c1a7d11ce33fe5971c51434ee4
|
|
- factor out checkFunctional() code so it can be
called from derived classes
- use EventWrapper for sendEvent, move event handling
code from event to port where it belongs
- make sendEvent a pointer so derived classes can
override it
- replace std::pair with new class for readability
--HG--
extra : convert_revision : 5709de2daacfb751a440144ecaab5f9fc02e6b7a
|
|
--HG--
extra : convert_revision : 24c00ec4904d9fb4d6e39521e0ff8b8f60d60f6a
|
|
--HG--
extra : convert_revision : bccafe884e58a55b02ff408448e6644196e439a4
|
|
the SConscript files so that only the objects that are
actually available in a given build are compiled in.
Remove a bunch of files that aren't used anymore.
--HG--
rename : src/python/m5/objects/AlphaTLB.py => src/arch/alpha/AlphaTLB.py
rename : src/python/m5/objects/SparcTLB.py => src/arch/sparc/SparcTLB.py
rename : src/python/m5/objects/BaseCPU.py => src/cpu/BaseCPU.py
rename : src/python/m5/objects/FuncUnit.py => src/cpu/FuncUnit.py
rename : src/python/m5/objects/IntrControl.py => src/cpu/IntrControl.py
rename : src/python/m5/objects/MemTest.py => src/cpu/memtest/MemTest.py
rename : src/python/m5/objects/FUPool.py => src/cpu/o3/FUPool.py
rename : src/python/m5/objects/FuncUnitConfig.py => src/cpu/o3/FuncUnitConfig.py
rename : src/python/m5/objects/O3CPU.py => src/cpu/o3/O3CPU.py
rename : src/python/m5/objects/OzoneCPU.py => src/cpu/ozone/OzoneCPU.py
rename : src/python/m5/objects/SimpleOzoneCPU.py => src/cpu/ozone/SimpleOzoneCPU.py
rename : src/python/m5/objects/BadDevice.py => src/dev/BadDevice.py
rename : src/python/m5/objects/Device.py => src/dev/Device.py
rename : src/python/m5/objects/DiskImage.py => src/dev/DiskImage.py
rename : src/python/m5/objects/Ethernet.py => src/dev/Ethernet.py
rename : src/python/m5/objects/Ide.py => src/dev/Ide.py
rename : src/python/m5/objects/Pci.py => src/dev/Pci.py
rename : src/python/m5/objects/Platform.py => src/dev/Platform.py
rename : src/python/m5/objects/SimConsole.py => src/dev/SimConsole.py
rename : src/python/m5/objects/SimpleDisk.py => src/dev/SimpleDisk.py
rename : src/python/m5/objects/Uart.py => src/dev/Uart.py
rename : src/python/m5/objects/AlphaConsole.py => src/dev/alpha/AlphaConsole.py
rename : src/python/m5/objects/Tsunami.py => src/dev/alpha/Tsunami.py
rename : src/python/m5/objects/T1000.py => src/dev/sparc/T1000.py
rename : src/python/m5/objects/Bridge.py => src/mem/Bridge.py
rename : src/python/m5/objects/Bus.py => src/mem/Bus.py
rename : src/python/m5/objects/MemObject.py => src/mem/MemObject.py
rename : src/python/m5/objects/PhysicalMemory.py => src/mem/PhysicalMemory.py
rename : src/python/m5/objects/BaseCache.py => src/mem/cache/BaseCache.py
rename : src/python/m5/objects/CoherenceProtocol.py => src/mem/cache/coherence/CoherenceProtocol.py
rename : src/python/m5/objects/Repl.py => src/mem/cache/tags/Repl.py
rename : src/python/m5/objects/Process.py => src/sim/Process.py
rename : src/python/m5/objects/Root.py => src/sim/Root.py
rename : src/python/m5/objects/System.py => src/sim/System.py
extra : convert_revision : 173f8764bafa8ef899198438fa5573874e407321
|
|
it with FreeBSD's implementation
--HG--
extra : convert_revision : ef9c4551b9a6b54b76a89f286ff9804c55790621
|
|
into doughnut.mwconnections.com:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : 276d00a73b1834d5262129c3f7e0f7fae18e23bc
|
|
generated.
--HG--
extra : convert_revision : e751969973599cde711f9d4de0dc4772dda651ed
|
|
ext/ply/ply/lex.py:
ext/ply/ply/yacc.py:
ext/ply/CHANGES:
ext/ply/README:
ext/ply/TODO:
ext/ply/doc/ply.html:
ext/ply/example/ansic/clex.py:
ext/ply/example/ansic/cparse.py:
ext/ply/example/calc/calc.py:
ext/ply/example/hedit/hedit.py:
ext/ply/example/optcalc/calc.py:
ext/ply/test/README:
ext/ply/test/calclex.py:
ext/ply/test/lex_doc1.exp:
ext/ply/test/lex_doc1.py:
ext/ply/test/lex_dup1.exp:
ext/ply/test/lex_dup1.py:
ext/ply/test/lex_dup2.exp:
ext/ply/test/lex_dup2.py:
ext/ply/test/lex_dup3.exp:
ext/ply/test/lex_dup3.py:
ext/ply/test/lex_empty.py:
ext/ply/test/lex_error1.py:
ext/ply/test/lex_error2.py:
ext/ply/test/lex_error3.exp:
ext/ply/test/lex_error3.py:
ext/ply/test/lex_error4.exp:
ext/ply/test/lex_error4.py:
ext/ply/test/lex_hedit.exp:
ext/ply/test/lex_hedit.py:
ext/ply/test/lex_ignore.exp:
ext/ply/test/lex_ignore.py:
ext/ply/test/lex_re1.exp:
ext/ply/test/lex_re1.py:
ext/ply/test/lex_rule1.py:
ext/ply/test/lex_token1.py:
ext/ply/test/lex_token2.py:
ext/ply/test/lex_token3.py:
ext/ply/test/lex_token4.py:
ext/ply/test/lex_token5.exp:
ext/ply/test/lex_token5.py:
ext/ply/test/yacc_badargs.exp:
ext/ply/test/yacc_badargs.py:
ext/ply/test/yacc_badprec.exp:
ext/ply/test/yacc_badprec.py:
ext/ply/test/yacc_badprec2.exp:
ext/ply/test/yacc_badprec2.py:
ext/ply/test/yacc_badrule.exp:
ext/ply/test/yacc_badrule.py:
ext/ply/test/yacc_badtok.exp:
ext/ply/test/yacc_badtok.py:
ext/ply/test/yacc_dup.exp:
ext/ply/test/yacc_dup.py:
ext/ply/test/yacc_error1.exp:
ext/ply/test/yacc_error1.py:
ext/ply/test/yacc_error2.exp:
ext/ply/test/yacc_error2.py:
ext/ply/test/yacc_error3.exp:
ext/ply/test/yacc_error3.py:
ext/ply/test/yacc_inf.exp:
ext/ply/test/yacc_inf.py:
ext/ply/test/yacc_missing1.exp:
ext/ply/test/yacc_missing1.py:
ext/ply/test/yacc_nodoc.exp:
ext/ply/test/yacc_nodoc.py:
ext/ply/test/yacc_noerror.exp:
ext/ply/test/yacc_noerror.py:
ext/ply/test/yacc_nop.exp:
ext/ply/test/yacc_nop.py:
ext/ply/test/yacc_notfunc.exp:
ext/ply/test/yacc_notfunc.py:
ext/ply/test/yacc_notok.exp:
ext/ply/test/yacc_notok.py:
ext/ply/test/yacc_rr.exp:
ext/ply/test/yacc_rr.py:
ext/ply/test/yacc_simple.exp:
ext/ply/test/yacc_simple.py:
ext/ply/test/yacc_sr.exp:
ext/ply/test/yacc_sr.py:
ext/ply/test/yacc_term1.exp:
ext/ply/test/yacc_term1.py:
ext/ply/test/yacc_unused.exp:
ext/ply/test/yacc_unused.py:
ext/ply/test/yacc_uprec.exp:
ext/ply/test/yacc_uprec.py:
Import patch ply.diff
src/arch/isa_parser.py:
everything is now within the ply package
--HG--
rename : ext/ply/lex.py => ext/ply/ply/lex.py
rename : ext/ply/yacc.py => ext/ply/ply/yacc.py
extra : convert_revision : fca8deabd5c095bdeabd52a1f236ae1404ef106e
|
|
--HG--
extra : convert_revision : 832e52ba80cbab2f5bb6d5b5977a499d41b4d638
|
|
and schedules the event immediately.
--HG--
extra : convert_revision : a84e729a5ef3632cbe6cff858c453c782707d983
|
|
--HG--
extra : convert_revision : 36c33d25a3b23ac2094577aa504c24fac0f3ffcc
|
|
port. It would be better to move this to python IMO but for
now I'll stick in a compatibility hack.
--HG--
extra : convert_revision : a81a29cbd43becd0e485559eb7b2a31f7a0b082d
|